An overview of the system architecture and algorithms used for the DO Central Track Trigger (CTT) in the Run 2 of the Fermilab Tevatron Proton-Antiproton Collider is presented. This system uses information from the newly commissioned Central Fiber Tracker and Preshower Detectors to generate Level 1 trigger decisions. It also generates lists of seed tracks and preshower clusters that are sent to the Level 1 Muon Trigger, L2 Silicon Track Trigger, and Central and Forward Preshower Level 2 preprocessors. The system consists of modular boards which utilize field-programmable gate arrays (FPGAs) to implement trigger algorithms. The system delivers trigger decisions every 132 ns, based on input data flowing at a maximum sustained rate of 475 gigabits per second. The first results of trigger efficiency studies are presented.