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  • A Compact Front-End Circuit...
    Piro, F.; Aglieri Rinella, G.; Andronic, A.; Antonelli, M.; Aresti, M.; Baccomi, R.; Becht, P.; Beole, S.; Braach, J.; Buckland, M. D.; Buschmann, E.; Camerini, P.; Carnesecchi, F.; Cecconi, L.; Charbon, E.; Contin, G.; Dannheim, D.; De Melo, J.; Deng, W.; Di Mauro, A.; Dimitrova Vassilev, M.; Emiliani, S.; Hasenbichler, J.; Hillemanns, H.; Hong, G. H.; Isakov, A.; Junique, A.; Kluge, A.; Kotliarov, A.; Krizek, F.; Kugathasan, T.; Lautner, L.; Lemoine, C.; Mager, M.; Marras, D.; Martinengo, P.; Masciocchi, S.; Menzel, M. W.; Munker, M.; Rachevski, A.; Rebane, K.; Reidt, F.; Russo, R.; Sanna, I.; Sarritzu, V.; Senyukov, S.; Snoeys, W.; Sonneveld, J.; Suljic, M.; Svihra, P.; Tiltmann, N.; Usai, G.; Van Beelen, J. B.; Vernieri, C.; Villani, A.

    IEEE transactions on nuclear science, 09/2023, Letnik: 70, Številka: 9
    Journal Article

    This paper presents the design of a front-end circuit for monolithic active pixel sensors. The circuit operates with a sensor featuring a small, low-capacitance (< 2 fF) collection electrode and is integrated in the DPTS chip, a proof-of-principle prototype of 1.5 mm × 1.5 mm including a matrix of 32 × 32 pixels with a pitch of 15 μm. The chip is implemented in the 65 nm imaging technology from the Tower Partners Semiconductor Co. foundry and was developed in the framework of the EP-R&D program at CERN to explore this technology for particle detection. The front-end circuit has an area of 42 μm 2 and can operate with a power consumption as low as 12 nW. Measurements on the prototype relevant to the front-end will be shown to support its design.