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Yamawaki, T.; Kokubo, M.; Irie, K.; Matsui, H.; Hori, K.; Endou, T.; Hagisawa, H.; Furuya, T.; Shimizu, Y.; Katagishi, M.; Hildersley, J.R.
IEEE journal of solid-state circuits, 1997-Dec., 1997-12-00, 19971201, Letnik: 32, Številka: 12Journal Article
A 2.7-V RF transceiver IC is intended for small, low-cost global system for mobile communications (GSM) handsets. This chip includes a quadrature modulator (QMOD) and an offset phase locked loop (OPLL) in the transmit path and a dual IF receiver that consists of a low noise amplifier (LNA) with an active-bias circuit, two Gilbert-cell mixers, a programmable gain linear amplifier (PGA), and a quadrature demodulator (QDEM). The IC also contains frequency dividers with a very high frequency voltage controlled oscillator (VHF-VCO) to simplify the receiver design. The system evaluation results are the phase error of 2.7/spl deg/ r.m.s. and the noise transmitted in the GSM receiving band of -163 dBc/Hz for transmitters and the reference sensitivity of -105 dBm for receivers. Power-control functions are provided for independent transmit and receive operation. The IC is implemented by using bipolar technology with f/sub T/=15 GHz, r'/sub bb/=150 /spl Omega/, and 0.6-/spl mu/m features.
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