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Yoo, Juhwan; Chen, Zijun; Arute, Frank; Montazeri, Shirin; Szalay, Marco; Erickson, Catherine; Evan, Jeffrey; Fatemi, Reza; Giustina, Marissa; Ansmann, Markus; Lucero, Erik; Kelly, Julian; Bardin, Joseph C
IEEE journal of solid-state circuits, 01/2023, Letnik: 58, Številka: 11Journal Article
A universal fault-tolerant quantum computer will require large-scale control systems that can realize all the waveforms required to implement a gateset that is universal for quantum computing. Optimization of such a system, which must be precise and extensible, is an open research challenge. Here, we present a cryogenic quantum control integrated circuit (IC) that is able to control all the necessary degrees of freedom of a two-qubit subcircuit of a superconducting quantum processor. Specifically, the IC contains a pair of 4–8-GHz RF pulse generators for Formula Omitted control, three baseband current generators for qubit and coupler frequency control, and a digital controller that includes a sequencer for gate sequence playback. After motivating the architecture, we describe the circuit-level implementation details and present experimental results. Using standard benchmarking techniques, we show that the cryogenic CMOS (cryo-CMOS) IC is able to execute the components of a gateset that is universal for quantum computing while achieving single-qubit Formula Omitted and Formula Omitted average gate error rates of 0.17%–0.36% and 0.14%–0.17%, respectively, as well as two-qubit average cross-entropy benchmarking (XEB) cycle error rates of 1.2%. These error rates, which were achieved while dissipating just 4 mW/qubit, are comparable to the measured error rates obtained using baseline room-temperature electronics.
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JCR | SNIP | JCR | SNIP | JCR | SNIP | JCR | SNIP |
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in: SICRIS
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