A novel aperture error reduction technique for subrange successive approximation register analog-to-digital converter (SAR ADC) is presented in this paper. By reusing capacitors of flash ADC during fine conversion phase, thermometer coarse capacitors belonging to CDAC can be removed from the circuit. Compared with the conventional subrange SAR ADC without front-end T/H, this technique can minimize aperture error effectively. The reduced number of sample capacitors also lowers the input capacitance. The proposed 11-bit 200Ms/s subrange SAR ADC, which consists of a 3.5-bit flash ADC for coarse conversion and an 8-bit SAR ADC for fine conversion is designed in a 65nm process with 1.2V power supply. Simulation results show that this design achieves 67.32dB SNDR and consumes 2.676mW.