E-resources
Peer reviewed
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Hwang, B.-Y.; Bushey, T.P.; Kirchgessner, J.A.; Foertsch, S.A.; Stipanuk, J.J.; Marshbanks, L.; Hernandez, J.A.; Herald, E.R.
IEEE journal of solid-state circuits, 04/1989, Volume: 24, Issue: 2Journal Article
A 1 K*1 bipolar ECL (emitter-coupled logic) static RAM using polysilicon-diode loaded memory cell is realized in a single-poly bipolar process technology. The use of the polysilicon diode as the load element for the memory cell is made possible by the fact that its I-V characteristics exhibit an ideality factor of two. The hold voltage for the memory cell is larger than 240 mV over a wide range of cell currents with the lower bound residing in the submicroampere range. Results show extremely stable operation against row-select sensitivity. A 1.5-ns row address access time has been obtained from the test circuit.< >
