The design of a 32-bit datapath allows computer architect to simulate possible extents for RISC based processors to other form of operations needed for complex applications. The study aims to analyse ...the device accuracy and its functionality such that Application Specific-FPGA (AS-FPGA) can be constructed for future use or applications and become part of a fully functional device. In order to have a fully functional datapath and control unit, the operations intended for such application must have an accurate data value to be used in the data processing; instructions in the arithmetic and logic operations, flag bits, memory, and register files that are directed by the control unit and is controlled using code bit as part of the machine code. The design must have functional units such as the control unit, program counter, instruction memory, register file, sign extender module, multiplexers, arithmetic logic unit (ALU), and the data memory. The study was successfully designed a 32-bit single-cycle datapath and simulate RISC based instructions in XILINX-ISE and successfully implemented the design in the DE0-nano FPGA targeting the Cyclone-IV FPGA. The testing for accuracy and functionality with the two approach resulted to an overall success rate which means that both approach in the simulation and implementation correspond with the same output.
This paper addresses a significant challenge that has emerged over the last few decades: the application of nature-inspired computing to develop advanced control systems in robotics. By drawing on ...concepts and algorithms derived from biological phenomena, the research seeks to enhance the behavior and performance of mobile robots in diverse environments and operational scenarios. This study focuses on the application of living cell functions and communication models to design reconfigurable control systems that leverage parallel and concurrent data processing. To achieve this, the paper proposes the structure of a computing cell, a Venn diagram of the control system grounded in the membrane computing model, and a functional diagram of the control system. These foundations support the prototyping and deployment of a sensor array for managing the position of mobile robots within their workspace.
With the advancement of technology, the digital Integrated Circuit (IC) design process has become more complex and denser. Hence, the IC testing procedure requires high-end test equipment to validate ...the accuracy and reliability of the manufactured components. Testers with such capabilities usually cost millions of dollars. In this paper, the authors have presented a low-cost hardware and software solution for digital IC testing. Digital ICs which operate under the 100MHz range can be easily tested in the digital domain with the FPGA-based test environment. The presented design comprises of a scalable architecture with a set of clock synchronized Altera DE0-Nano Field Programmable Gate Arrays (FPGAs) which handles the digital testing of Device Under Test (DUT) at a low cost. The digital test patterns are generated inside a computer, which transfers them to the FPGA environment and feeds them to DUT. The resulting patterns captured by the FPGAs are sent back to the computer, where they are compared with the expected results. The design prototype made by the authors of this paper consists of 48 digital input/ output channels which can source and capture bit streams parallelly to test digital ICs up to 100MHz frequency. Furthermore, the prototyped tester consists of electrical measuring instruments that can measure voltages with a 10mV accuracy and currents with a 10µA accuracy.
Modern day robotics is fast developing and evolving in various areas of multi sensor applications like body sensor networks and mine detection. A flexible platform that can be easily integrated into ...variety of sensors is very essential in any complex environment. A reconfigurable hardware provides a suitable platform to identify and improve existing models used in metal detection industry. In this paper, we propose and implement a metal detection module using Terasic Spider Robot, planned to be used in landmine detection operations. A hardware circuit model to detect metal was designed for the metal detection module and embedded on the TSR. The on board control system was implemented using a reconfigurable DE0 Nano System on Chip platform that can further process the information from the metal detector using efficient algorithm. The movement of the TSR was controlled remotely by Bluetooth using a smartphone app designed specifically for this application. The design also intimates the user with a message on detecting the metal. The design was implemented successfully and the metal detection module detected buried metals at a depth of maximum 7cm.
