Arb is a C library for arbitrary-precision interval arithmetic using the midpoint-radius representation, also known as ball arithmetic. It supports real and complex numbers, polynomials, power ...series, matrices, and evaluation of many special functions. The core number types are designed for versatility and speed in a range of scenarios, allowing performance that is competitive with noninterval arbitrary-precision types such as MPFR and MPC floating-point numbers. We discuss the low-level number representation, strategies for precision and error bounds, and the implementation of efficient polynomial arithmetic with interval coefficients.
We show how to interpret weak Kőnig's lemma in some recently defined theories of nonstandard arithmetic in all finite types. Two types of interpretations are described, with very different ...verifications. The celebrated conservation result of Friedman's about weak Kőnig's lemma can be proved using these interpretations. We also address some issues concerning the collecting of witnesses in herbrandized functional interpretations.
Chaotic dynamics is widely used to design pseudo-random number generators and for other applications, such as secure communications and encryption. This paper aims to study the dynamics of the ...discrete-time chaotic maps in the digital (i.e., finite-precision) domain. Differing from the traditional approaches treating a digital chaotic map as a black box with different explanations according to the test results of the output, the dynamical properties of such chaotic maps are first explored with a fixed-point arithmetic, using the Logistic map and the Tent map as two representative examples, from a new perspective with the corresponding state-mapping networks (SMNs). In an SMN, every possible value in the digital domain is considered as a node and the mapping relationship between any pair of nodes is a directed edge. The scale-free properties of the Logistic map's SMN are proved. The analytic results are further extended to the scenario of floating-point arithmetic and for other chaotic maps. Understanding the network structure of a chaotic map's SMN in digital computers can facilitate counteracting the undesirable degeneration of chaotic dynamics in finite-precision domains, also helping to classify and improve the randomness of pseudo-random number sequences generated by iterating the chaotic maps.
While Margulis' superrigidity theorem completely describes the finite dimensional linear representations of lattices of higher rank simple real Lie groups, almost nothing is known concerning the ...representation theory of complex hyperbolic lattices. The main result of this paper (Theorem 1.3) is a strong rigidity theorem for a certain class of cocompact arithmetic complex hyperbolic lattices. It relies on the following two ingredients: Theorem 1.6 showing that the representations of the topological fundamental group of a compact Kaehler manifold X are controlled by the global symmetric differentials on X.An arithmetic vanishing theorem for global symmetric differentials on certain compact ball quotients using automorphic forms, in particular deep results of Clozel on base change (Theorem 1.11).
The moduli space of smooth curves admits a beautiful compactification $\mathcal{M}_{g,n} \subset \overline{\mathcal{M}}_{g,n}$ by the moduli space of stable curves. In this paper, we undertake a ...systematic classification of alternate modular compactifications of $\mathcal{M}_{g,n}$. Let $\mathcal{U}_{g,n}$ be the (non-separated) moduli stack of all n-pointed reduced, connected, complete, one-dimensional schemes of arithmetic genus g. When g=0, $\mathcal{U}_{0,n}$ is irreducible and we classify all open proper substacks of $\mathcal{U}_{0,n}$. When g greater than or equal to 1, $\mathcal{U}_{g,n}$ may not be irreducible, but there is a unique irreducible component $\mathcal{V}_{g,n} \subset\mathcal{U}_{g,n}$ containing $\mathcal{M}_{g,n}$. We classify open proper substacks of $\mathcal {V}_{g,n}$ satisfying a certain stability condition.
AritPIM: High-Throughput In-Memory Arithmetic Leitersdorf, Orian; Leitersdorf, Dean; Gal, Jonathan ...
IEEE transactions on emerging topics in computing,
07/2023, Volume:
11, Issue:
3
Journal Article
Peer reviewed
Open access
Digital processing-in-memory (PIM) architectures are rapidly emerging to overcome the memory-wall bottleneck by integrating logic within memory elements. Such architectures provide vast computational ...power within the memory itself in the form of parallel bitwise logic operations. We develop novel algorithmic techniques for PIM that, combined with new perspectives on computer arithmetic, extend this bitwise parallelism to the four fundamental arithmetic operations (addition, subtraction, multiplication, and division), for both fixed-point and floating-point numbers, and using both bit-serial and bit-parallel approaches. We propose a state-of-the-art suite of arithmetic algorithms, demonstrating the first algorithm in the literature of digital PIM for a majority of cases - including cases previously considered impossible for digital PIM, such as floating-point addition. Through a case study on memristive PIM, we compare the proposed algorithms to an NVIDIA RTX 3070 GPU and demonstrate significant throughput and energy improvements.
This article proposes a general-purpose hybrid in-/near-memory compute SRAM (CRAM) that combines an 8T transposable bit cell with vector-based, bit-serial in-memory arithmetic to accommodate a wide ...range of bit-widths, from single to 32 or 64 bits, as well as a complete set of operation types, including integer and floating-point addition, multiplication, and division. This approach provides the flexibility and programmability necessary for evolving software algorithms ranging from neural networks to graph and signal processing. The proposed design was implemented in a small Internet of Things (IoT) processor in the 28-nm CMOS consisting of a Cortex-M0 CPU and 8 CRAM banks of 16 kB each (128 kB total). The system achieves 475-MHz operation at 1.1 V and, with all CRAMs active, produces 30 GOPS or 1.4 GFLOPS on 32-bit operands. It achieves an energy efficiency of 0.56 TOPS/W for 8-bit multiplication and 5.27 TOPS/W for 8-bit addition at 0.6 V and 114 MHz.
PDF
