Abstract Objective The objective of this systematic literature review was to evaluate the incidences and risks for adverse events (AEs) associated with oral and parenteral corticosteroids. An ...assessment was performed to estimate the costs of such AEs. Methods A systematic review of literature published from 2007 to 2009 was conducted to identify the incidence rates and risk ratios of corticosteroid-related AEs. The review protocol was developed according to PRISMA (Preferred Reporting Items for Systematic Reviews and Meta-Analyses) guidelines. The literature search was expanded to include additional search terms for psychiatric conditions, infections, and peptic ulcers. Costs obtained from a separate narrative literature review were applied to AEs likely to affect third-party payers in the United States. Results A total of 357 publications were identified from the primary (n = 323) and secondary (n = 34) searches. Of these, 310 were excluded because they did not evaluate AEs related to corticosteroids, were an excluded publication type, or for other reasons. A final list of 47 studies were used for data extraction. Across patient populations, the most frequently reported corticosteroid-associated AEs were psychiatric events, infections, gastric conditions, and fractures. Corticosteroid-associated AEs reported to occur at an incidence >30% were sleep disturbances, lipodystrophy, adrenal suppression, metabolic syndrome, weight gain, and hypertension. Vertebral fractures were reported at an incidence of 21% to 30%. Dose-response relationships were documented for fractures, acute myocardial infarction, hypertension, and peptic ulcer. The costs of managing AEs that may occur with corticosteroids can be substantial. The literature reported 1-year per-patient costs of up to $26,471.80 for nonfatal myocardial infarction, and per-event costs as high as $18,357.90 for fracture. The findings from the present review should be interpreted cautiously due to several limitations, including the retrospective design of most of the studies identified, risk for confounding due to underlying disease activity or patient population, and the relatively small number of studies that reported each AE association. As this cost analysis was preliminary, a comprehensive pharmacoeconomic analysis should be undertaken to confirm the findings. Conclusion Based on the findings from this review, systemic corticosteroids are a common cause of AEs that may be costly to payers.
The nonlinear error control code on the basis of cryptographic transformation of data through Rijndael algorithm is considered. Correction properties and fast decoding algorithms of a Rijndael-code ...are compare.
The nonlinear error control code on the basis of cryptographic transformation of data through Rijndael algorithm is considered. Hamming distance properties of a Rijndael-code in thread and block ...modes enciphering with borders of error control codes are compare.
This paper presents the first hardware implementation of the datagram transport layer security (DTLS) protocol to enable end-to-end security for the Internet of Things (IoT). A key component of this ...design is a reconfigurable prime field elliptic curve cryptography (ECC) accelerator that is 238<inline-formula> <tex-math notation="LaTeX">\times </tex-math></inline-formula> and 9<inline-formula> <tex-math notation="LaTeX">\times </tex-math></inline-formula> more energy-efficient compared to software and state-of-the-art hardware, respectively. Our full hardware implementation of the DTLS 1.3 protocol provides 438<inline-formula> <tex-math notation="LaTeX">\times </tex-math></inline-formula> improvement in energy-efficiency over software, along with code size and data memory usage as low as 8 and 3 KB, respectively. The cryptographic accelerators are coupled with an on-chip low-power RISC-V processor to benchmark applications beyond DTLS with up to two orders of magnitude energy savings. The test chip, fabricated in 65-nm CMOS, demonstrates hardware-accelerated DTLS sessions while consuming 44.08 <inline-formula> <tex-math notation="LaTeX">\mu \text{J} </tex-math></inline-formula>/handshake and 0.89 nJ/byte of the encrypted data at 16 MHz and 0.8 V.
Secure, efficient execution of AES is an essential requirement on most computing platforms. Dedicated Instruction Set Extensions (ISEs) are often included for this purpose. RISC-V is a (relatively) ...new ISA that lacks such a standardized ISE. We survey the state-of-the-art industrial and academic ISEs for AES, implement and evaluate five different ISEs, one of which is novel. We recommend separate ISEs for 32 and 64-bit base architectures, with measured performance improvements for an AES-128 block encryption of 4x and 10x with a hardware cost of 1.1K and 8.2K gates respectively, when compared to a software-only implementation based on use of T-tables. We also explore how the proposed standard bit-manipulation extension to RISC-V can be harnessed for efficient implementation of AES-GCM. Our work supports the ongoing RISC-V cryptography extension standardisation process.
Persistent Fault Analysis on Block Ciphers Fan Zhang; Xiaoxuan Lou; Xinjie Zhao ...
IACR transactions on cryptographic hardware and embedded systems,
08/2018, Letnik:
2018, Številka:
3
Journal Article
Recenzirano
Odprti dostop
Persistence is an intrinsic nature for many errors yet has not been caught enough attractions for years. In this paper, the feature of persistence is applied to fault attacks, and the persistent ...fault attack is proposed. Different from traditional fault attacks, adversaries can prepare the fault injection stage before the encryption stage, which relaxes the constraint of the tight-coupled time synchronization. The persistent fault analysis (PFA) is elaborated on different implementations of AES-128, specially fault hardened implementations based on Dual Modular Redundancy (DMR). Our experimental results show that PFA is quite simple and efficient in breaking these typical implementations. To show the feasibility and practicability of our attack, a case study is illustrated on the shared library Libgcrypt with rowhammer technique. Approximately 8200 ciphertexts are enough to extract the master key of AES-128 when PFA is applied to Libgcrypt1.6.3 with redundant encryption based DMR. This work puts forward a new direction of fault attacks and can be extended to attack other implementations under more interesting scenarios.
•Usage of EC operations as initial random generator and encrypting through AES to generate new pseudo random to mask whole image pixels.•Simulations and analysis results show that cooperation of AES ...and EC random numbers makes great results in randomness and image encryption field.•Comparable security and speed with other trend schemes like chaos based encryptions.
Elliptic Curve Cryptography (ECC) has proven to be an effective cryptography. ECC has its own advantages such as efficient key size compared to other Public Key Infrastructures. This paper exploits the Elliptic curve random generator defined by National Institute of Standards and Technology (NIST) to generate a sequence of arbitrary numbers based on curves. The random generation phase is based on public shared key and a changing point G, which is a generator of a curve to obtain random sequences. Then, Advanced Encryption System is applied to these sequences acquiring arbitrary keys for encrypting image. Using AES alongside well distributed randoms provides a prominent encryption technique. Our experiments show that the proposed method fulfills the basics of cryptography including simpleness and correctness. Moreover, the results of the evaluation prove the effectiveness and security of the proposed method.
The Advanced Encryption Standard (AES) algorithm and Counter (CTR) mode are used for numerous services as an encryption technique that provides confidentiality. Even though the AES with counter (AES ...CTR) mode has an advantage in that it can process multiple data blocks in parallel, its implementation should also be observed to reduce the computational burden of current services. In this paper, we propose an implementation method called FACE that can improve the performance of the AES CTR mode. The proposed method is based on five caches of frequently occurring intermediate values, so that it reduces the number of unnecessary computations. Our method can be employed in any AES CTR implementation, regardless of the platform, environment, or implementation method. There are two known AES implementation techniques, namely, counter-mode caching and bitslicing. FACE extends counter-mode caching in order to optimize the previous result and to maximize the scope of caching. We show that FACE can be applied efficiently to various implementations (table-based, bitsliced, and AES-NI-based). In particular, this is the first attempt to combine our extended counter-mode caching with bitsliced implementations of AES, and is also the first to apply counter-mode caching up to the round transformations of AES-NI implementation. To prove the efficiency of our proposed method, we conduct a performance evaluation in various environments, which we then compare with the previous fastest results. Our bitsliced FACE needs 6.41 cycles/byte on an Intel Core 2, and AES-NI-based FACE records 0.44 cycles/byte on an Intel Core i7.
•We examine farmers' motives to participate in agri-environmental schemes (AES), in five study areas in Europe.•Our principal findings show that AES tend to be used by larger scale and more ...production oriented properties.•AES tend to be used more by full-time, agriculturally-trained and younger farmers, with a post-primary educational background.•The main motives for AES participation were economic, as well as personal satisfaction.•Motives for AES participation were place-specific, reflecting differences in culture, agricultural systems, natural environments and landscapes.•Respondents from Northwestern European peri-urban areas were more motivated to participate in AES, while the opposite applied for the respondents of Central and Mediterranean areas with marginal potential for agriculture.•Hobby farmers appeared to be influenced by a variety of types of motives, as compared to other land owner groups.•Land use change, as a result of AES participation, seemed to concern mainly larger farms in the Central and Northewestern European study areas, where land use changes led to more intensive land use.
This paper investigates the personal and property characteristics of landowners who use EU Rural Development agri-environmental schemes (AES), as well as their motives for participation or non-participation in such schemes. The study is based on a questionnaire survey with landowners, in selected study areas in the Netherlands, Denmark, Austria, Italy and Greece. Our principal findings show that AES tend to attract more the owners of larger farms, who are frequently full-time, younger, post-primary school educated and agriculturally-trained farmers. The latter findings are contingent on local geographical particularities and on subjective factors, farmers' individualities, different rural cultures, landscape types, EU and national policies and special needs of the study areas—all areas where agricultural production is increasingly marginalized, for different reasons. Subsidy scheme participation motives did not seem to be strictly economic; they also regarded personal satisfaction. They are all together generally appeared to be place specific, since the respondents from peri-urban Northern European areas were more motivated to participate in AES than respondents from Central and Southern European areas with marginal potential for agriculture. Motives for non-participation were also found to be dependent on the level of farming engagement and on case-area landscape types.
In this paper, a new lightweight authenticated encryption scheme AESLBBB is proposed, which was designed to provide backward compatibility with advanced encryption standard (AES) as well as high ...security and low memory. The primary design goal, backward compatibility, is motivated by the fact that AES accelerators are now very common for devices in the field; we are interested in designing an efficient and highly secure mode of operation that exploits the best of those AES accelerators. The backward compatibility receives little attention in the NIST lightweight cryptography standardization process, in which only 3 out of 32 round-2 candidates are based on AES. Our mode, LBBB, is inspired by the design of ALE in the sense that the internal state size is a minimum 2n bits when using a block cipher of length n bits for the key and data. Unfortunately, there is no security proof of ALE, and forgery attacks have been found on ALE. In LBBB, we introduce an additional feed from block cipher’s output to the key state via a certain permutation λ, which enables us to prove beyond-birthday-bound (BBB) security. We then specify its AES instance, AES-LBBB, and evaluate its performance for (i) software implementation on a microcontroller with an AES coprocessor and (ii) hardware implementation for an application-specific integrated circuit (ASIC) to show that AES-LBBB performs better than the current state-of-the-art Remus-N2 with AES-128.
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