Model order reduction (MOR) has long been a mainstream strategy to accelerate large scale transient circuit simulation. Exponential integrator (EI) based on Krylov subspace approximation methods, on ...the other hand, are more recently developed for a similar goal. This paper aims to examine in-depth the underlying relationship between MOR and EI that are commonly seen as two separate methods. The main finding is that EI can be viewed as a moment-matching MOR in the time-domain. Specifically, EI, under certain conditions, is equivalent to performing moment-matching MOR based on rational Krylov subspace projection at each time step with a single input vector and a selected expansion point, then advancing the reduced system one step in the time-domain. The equivalence is mathematically proved under different settings and numerically verified in the experiments. Their differences in the transient circuit analysis context are also elaborated from various perspectives. It is hoped that these new insights would benefit the future development of this classical EDA topic.
Since quantum computers can solve important problems faster than classical computers, many resources have gone into the development of this technology in recent decades. Despite the tremendous ...progress that has already been made toward the development of quantum computers, they are still an emerging technology, which restricts access and reliability. Thus, research on quantum algorithms still heavily relies on quantum circuit simulators that run on classical hardware. However, simulating the execution of a quantum computer on conventional hardware is exponentially difficult, which is also the reason why quantum computing is an interesting technology in the first place. Particularly complex is noise-aware simulation of quantum computers, i.e., the consideration of noise effects that are common in today's quantum hardware during quantum circuit simulation. In this work, we investigate the use of decision diagrams for this task. To this end, we present two distinct approaches for noise-aware quantum circuit simulation, investigate how they can be realized using decision diagrams, and implement decision diagram-based solutions for each of the presented noise-aware simulation schemes. In an extensive evaluation, we unveil potential for further improvements and also demonstrate substantial speed-ups compared to the current state of the art.
A novel microwave limiter with non‐reciprocal limiting threshold is proposed in this paper to protect the transceiver switch or the transmitter. The directivity of the directional coupler is utilized ...to make the power of the received signal input to the detection circuit larger than that of the transmitted signal, thereby the detection circuit provides different DC bias voltages to the limiter circuit and changes the threshold level of the limiter diode. The test results show that this limiter has a threshold level of 35 dBm for the transmitted signal and 17 dBm for the received signal, which has a non‐reciprocal limiting threshold for high‐power signals input in both directions.
A novel microwave limiter with a non‐reciprocal limiting threshold is proposed in this paper, which aims at the problem that the traditional limiter having no directivity is unable to protect the transceiver switch or the transmitter. This non‐reciprocal limiter has a small insertion loss for the transmitted high‐power signal and a good limiting effect for the received high‐power signal.
To help design the next generation China Z-pinch driver CZ30, which is a 30 MA driver driven by linear transformer driver (LTD) modules, a new full-circuit simulation code called FCM-CZ30 was ...established. The code was used to perform simulation of CZ30 coupled with Z-pinch load. The results obtained from FCM-CZ30 are in a good agreement with those obtained from a commercial code called PSpice, which shows that the FCM-CZ30 is a reliable code. The inductance of the LTD system has a significant influence on the rise time of the load current, which is totally different from that in conventional Z-pinch drivers with multistage switches to compress the rise time of the pulse. For a wire-array load with an initial radius of 3.0 cm and a mass per unit length of 15 mg/cm, the peak value and the rise time (10%-90%) of the load current are 33.7 MA and 102.2 ns, respectively.
Most memristor-based Pavlov associative memory neural networks strictly require that only simultaneous food and ring appear to generate associative memory. In this article, the time delay is ...considered, in order to form associative memory when the food stimulus lags behind the ring stimulus for a certain period of time. In addition, the rate of learning can be changed with the length of time between the ring stimulus and food stimulus. A memristive neural network circuit that can realize Pavlov associative memory with time delay is designed and verified by the simulation results. The designed circuit consists of a synapse module, a voltage control module, and a time-delay module. The functions, such as learning, forgetting, fast learning, slow forgetting, and time-delay learning, are implemented by the circuit. The Pavlov associative memory neural network with time-delay learning provides a reference for further development of the brain-like systems.
The artificial neural network (ANN)-based compact modeling methodology is evaluated in the context of advanced field-effect transistor (FET) modeling for Design-Technology-Cooptimization (DTCO) and ...pathfinding activities. An ANN model architecture for FETs is introduced, and the results clearly show that by carefully choosing the conversion functions (i.e., from ANN outputs to device terminal currents or charges) and the loss functions for ANN training, ANN models can reproduce the current-voltage and charge-voltage characteristics of advanced FETs with excellent accuracy. A few key techniques are introduced in this work to enhance the capabilities of ANN models (e.g., model retargeting, variability modeling) and to improve ANN training efficiency and SPICE simulation turn-around-time (TAT). A systematical study on the impact of the ANN size on ANN model accuracy and SPICE simulation TAT is conducted, and an automated flow for generating optimum ANN models is proposed. The findings in this work suggest that the ANN-based methodology can be a promising compact modeling solution for advanced DTCO and pathfinding activities.
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