•I-V hysteresis curves of perovskite cells were analyzed by a circuit simulator.•A circuit model with three diodes showed a typical I-V hysteresis curve.•The simulated and experimental curves are in ...good agreement by diode parameters.•A peculiar hysteresis can be simulated by setting the diffusion capacitance.•The models of hysteresis-inducing cell structure have been proposed.
We have analyzed current-voltage (I-V) hysteresis curves of perovskite solar cells by an equivalent circuit using a circuit simulator in order to quickly certificate cell performances. A circuit model that added a sub-diode with a large saturation current and a reverse diode to the basic equivalent circuit of a solar cell showed a typical I-V hysteresis curve by setting the junction capacitance of the reverse diode. Furthermore, the simulated I-V curves are in good agreement with the peculiar experimental curves where the maximum power point current density (Jpmax) is higher than the short circuit current density (Jsc) due to the setting of the sub-diode diffusion capacitance. Based on the equivalent circuit model, we have proposed a hysteresis-inducing cell structure in which the grains and grain boundaries of the perovskite film form the main diode of the solar cell and the sub-diode with a large saturation current, respectively.
In this letter, a novel true random number generator (TRNG) with high energy‐efficient and throughput is proposed for cryptographic systems. The current starve based ring oscillator (CSRO) is biased ...in the subthrehold region as an entropy source. An individual ring oscillator (RO) is sampled using multiple sampling points of the CSRO working in the sub‐threshold region to obtain a multi‐channel sequence output, thereby fully exploiting the randomness of the entropy source. The proposed TRNG is implemented using a standard 40nm CMOS technology and the simulation results show that it provides high‐quality and 20.66 Mbps random sequences while only consuming 11.46 μW at 1.1 V, 25°C. In addition, the proposed TRNG passes the NIST SP 800‐22 and the NIST SP 800‐90B tests without post‐processing and outperforms the state‐of‐the‐art in terms of energy consumption per bit of the output bitstream, reaching 0.555pJ/bit.
In this letter, we proposed a novel true random number generator (TRNG) based on multi‐stage sampling of the current starve‐based ring oscillator (CSRO) to reduce the power consumption per bit of the output binary sequence. The simulation results show that it provides high‐quality and 20.66 Mbps random sequences while only consuming 11.46 μW at 1.1 V, 25°C which means its energy consumption per bit reaches 0.555pJ/bit, much lower than existing conventional design. The proposed TRNG also passes the NIST 800‐22 and NIST SP 800‐90B tests.
In this work, we developed a new transistor model that can be used to simulate analog circuits. Our model uses artificial neural network to capture the electrical characteristics of transistors ...instead of the traditional physics-driven model. By preprocessing the transistor data, high-precision modeling is achieved. N-type and p-type transistors with various widths and lengths are fabricated with the 0.18 μm analog process in the foundry. ANN modeling on these transistors shows high precision compared with the BSIM3 transistor model. The results show that the DC characteristics of the ANN model are more accurate than the BSIM3 transistor model, and have better capture on the output-resistance of the MOSFET.
•A new transistor model that can be used to simulate analog circuits.•Uses ANN to capture the electrical characteristics of transistors instead of the traditional physics-driven model.•By preprocessing the transistor data, high-precision modeling is achieved.•ANN modeling shows high precision compared with the BSIM3.3 transistor model.
With the wide application of the CLLC converters in bidirectional electric vehicle (EV) chargers, it becomes more important to improve their performance through proper parameter design. Compared with ...the frequency domain model, the time domain model can significantly improve the accuracy of converter design. However, the currently generalized operation mode analysis (OMA) method requires complicated operating mode judgment and solving systems of transcendental equations, which limits its practicality. To address this issue, a discrete event-driven piecewise analytic model (DEPAM) of CLLC converter is proposed in this paper. DEPAM obtains the transient and steady-state waveforms without the need for operating mode judgment and solving transcendental equations. Relying on DEPAM, a design methodology of the CLLC converter is introduced in this paper, which applies the lookup table method to the normalized parameters and achieves a complete traversal of all possible parameter combinations of the CLLC converter. This traversal considers gain range, soft-switching, capacitor voltage stress, and RMS current simultaneously. Finally, the design methodology is demonstrated through a 1 kW prototype with 98.8% peak efficiency.
Advanced Equivalence Checking for Quantum Circuits Burgholzer, Lukas; Wille, Robert
IEEE transactions on computer-aided design of integrated circuits and systems,
09/2021, Letnik:
40, Številka:
9
Journal Article
Recenzirano
Odprti dostop
In the not-so-distant future, quantum computing will change the way we tackle certain problems. It promises to dramatically speed-up many chemical, financial, cryptographical, and machine-learning ...applications. However, in order to capitalize on those promises, complex design flows composed of steps, such as compilation, decomposition, mapping, or transpilation need to be employed before being able to execute a conceptual quantum algorithm on an actual device. This results in many descriptions at various levels of abstraction which may significantly differ from each other. The complexity of the underlying design problems makes it ever more important to not only provide efficient solutions for the single steps but also to verify that the originally intended functionality is preserved throughout all levels of abstraction. This motivates methods for equivalence checking of quantum circuits. However, most existing methods for this are inspired by equivalence checking in the classical realm and have merely been extended to support quantum circuits (i.e., circuits which do not only rely on 0's and 1's but also employ superposition and entanglement). In this work, we propose an advanced methodology that takes the different paradigms of quantum circuits not only as a burden but as an opportunity. In fact, the proposed methodology explicitly utilizes characteristics unique to quantum computing in order to overcome the shortcomings of existing approaches. We show that by exploiting the reversibility of quantum circuits, complexity can be kept feasible in many cases. Moreover, we show that, in contrast to the classical realm, simulation is very powerful in verifying quantum circuits. Experimental evaluations confirm that the resulting methodology allows one to conduct equivalence checking dramatically faster than ever before-in many cases just a single simulation run is sufficient. An implementation of the proposed equivalence checking flow is publicly available at https://iic.jku.at/eda/research/quantum_verification/ .
This paper presents simulation and hardware implementation of incremental conductance (IncCond) maximum power point tracking (MPPT) used in solar array power systems with direct control method. The ...main difference of the proposed system to existing MPPT systems includes elimination of the proportional-integral control loop and investigation of the effect of simplifying the control circuit. Contributions are made in several aspects of the whole system, including converter design, system simulation, controller programming, and experimental setup. The resultant system is capable of tracking MPPs accurately and rapidly without steady-state oscillation, and also, its dynamic performance is satisfactory. The IncCond algorithm is used to track MPPs because it performs precise control under rapidly changing atmospheric conditions. MATLAB and Simulink were employed for simulation studies, and Code Composer Studio v3.1 was used to program a TMS320F2812 digital signal processor. The proposed system was developed and tested successfully on a photovoltaic solar panel in the laboratory. Experimental results indicate the feasibility and improved functionality of the system.
In recent years, memristors have shown great potential in building artificial neural networks. Many researchers have worked on improving and innovating the design of memristors. The bifunctional ...memristor proposed in this paper provides new ideas for establishing artificial neural networks. And a novel second-order memristor Hindmarsh–Rose neuron (SOM-HR) is constructed on this basis. The SOM-HR model can well simulate the dynamical behavior of the memristive autapse HR neuron under electromagnetic radiation (EMR), and many types of firing patterns, coexisting firing patterns and state transition are found. In addition, the correctness of the numerical simulation is verified by circuit simulation and digital signal processor (DSP) implementation. Finally, the chaotic sequences generated by this model are used for image encryption, which guarantees the security of the encryption scheme. The results of the study provide a reference for construction and application of complex neural network.
•A second-order flux-controlled memristor is designed.•An analog circuit for the memristor was constructed.•Biological neuron modeling based on bifunctional memristor•The dynamical behavior of the new neural model is analyzed.•The neuron model was implemented by analog circuit and DSP platform respectively.
This paper presents a new three-dimensional chaotic system with a nonlinear term. More interesting is that the system can produce different types of coexisting attractors under one sets of fixed ...model parameters, which include point attractor, bursting orbit, three kinds of period orbits, and two kinds of chaotic orbits. At the same time, the coexisting attractors have nested structure. In addition, riddled basins are observed on local attraction basins, which indicate that the dynamical behaviors of proposed system are extremely sensitive to the initial conditions. Finally, by setting different initial condition, the circuit can generate multitudinous coexisting attractors. The circuit implementation in Pspice supports furtherly numerical analyses and validates the mathematical model.
In this paper, a compact DC SPICE model for 4H-SiC lateral metal oxide semiconductor field effect transistors is shown both for PMOSFET and NMOSFET. It is validated through experimental comparisons ...by varying channel sizes, temperature in the range between 298K and 573K, and body voltage conditions. A new model of the threshold voltage is introduced in order to take into account the effects of the high interface defects density. Finally, an inverter logic gate is simulated at different temperatures and compared with experimental data and with BSIM4SiC simulation outcomes, where a maximum logic threshold voltage error of 0.85% to the experimental data is shown compared to 6.78% of BSIM4SiC.
Hardware neural networks (HNNs) based on crossbar arrays are expected to be energy-efficient computing architectures for solving complex tasks due to their small feature sizes. Although there exist ...software libraries able to deal with circuit simulation of memristor networks, they still exceed the memory available of any consumer grade GPU's VRAM for large scale crossbar arrays while having a significant computational complexity. This work discusses an iterative method to implement a fast simulation of the corresponding memristor crossbar array with much more limited memory use.
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