Reduced-Pin-Count BOST for Test-Cost Reduction Lee, Youngkwang; Lee, Young-Woo; Seo, Sungyoul ...
IEEE transactions on computer-aided design of integrated circuits and systems,
03/2022, Letnik:
41, Številka:
3
Journal Article
Recenzirano
Built-off self-test (BOST) is a widely used technique to reduce the test cost. It makes it possible to test high-speed dynamic random-access memory (DRAM) without using a costly high-performance ...automatic test equipment (ATE). However, the currently used BOSTs require many ATE connection pins, which degrade the cost reduction effect. In this article, we propose a novel reduced-pin-count BOST to reduce the test cost. The proposed BOST uses bidirectional pins to employ the pins as efficiently as possible. Thus, even if the same amount of data is transferred, fewer pins are required than the previous BOSTs. In addition, it reduces the amount of output data by sending only the information necessary for a DRAM repair process. This is possible because the DRAM repair process requires only the location information of some faulty cells. Therefore, the proposed BOST can send output data with fewer pins compared with the previous BOSTs. Experimental results indicate that the proposed BOST can test high-speed DRAMs using a few ATE connection pins.
The detection status and existing problems of the anti-soft and heavy object impact performance of glass and metal guardrails for buildings were briefly described in the article. A set of detection ...equipment was designed for the shortcomings, which mainly included guardrail installation devices, height positioning devices, and impact control systems. It has the advantages of small size, low cost, simple operation, high efficiency and low uncertainty, etc. In addition, the influence of factors such as installation quality and test environment on the test results can be excluded, which greatly improves the accuracy and fairness of the test results.
Error vector magnitude (EVM) or alternately offset EVM (OEVM) is one of the most important performance to verify for RF circuits, such as ZigBee transmitters in order to ensure that the quality of ...the generated modulated signal complies with the requirements of the wireless communication standard. The conventional solution to measure this performance relies on the use of an automatic test equipment (ATE) equipped with expensive RF channels. This article presents a low-cost solution that permits to realize EVM measurement using only a standard digital ATE. The approach is based on 1-bit undersampled acquisition of the RF modulated signal by a digital tester channel associated with a specifically tailored processing algorithm. This algorithm involves many different steps that are detailed in this article, including phase and amplitude fluctuation extraction, RF signal reconstruction, symbol clock recovery, symbol bits detection, and synthesis of reference data for EVM calculation. The proposed digital test solution is first evaluated through lab hardware experiments and then validated with EVM measurements on an industrial ATE.
Abstract
Pendulum impact test equipment cannot meet the high magnitude test demand of large products. This paper designed a pneumatic impact test which can make a high-magnitude impact test, giving ...the design principle of the pneumatic impact test system, introducing the design methods of the pneumatic test system. The test results show that the technical indexes of the system meet the design requirements. The pneumatic impact test system with a 1.25 m× 1.25 m table based on the shock response spectrum principle can realize the inflection frequency adjustable from 500 to 1500 Hz and the slope adjustable from +6 to +9 dB. And it can realize the shock response spectrum test of 5000g magnitude at full load. The test system can meet the current test magnitude and test requirements of spacecraft products. The method proposed in this paper can serve as a reference for the design of this kind of impact test systems.
Unsupervised cross-domain fault diagnosis of bearings has practical significance; however, the existing studies still face some problems. For example, transfer diagnosis scenarios are limited to the ...experimental domain, cross-domain marginal distribution and conditional distribution are difficult to align simultaneously, and each source-domain sample is assigned with equal importance during the domain adaptation process. Aiming at the above-mentioned challenges, this article proposes a novel joint transfer network for unsupervised bearing fault diagnosis from the simulation domain to the experimental domain. The sufficient bearing simulation data containing rich fault label information are used to construct the source domain to reduce the dependence on the resources of laboratory test rigs. An improved loss function embedded with joint maximum mean discrepancy is designed to achieve simultaneous alignments of marginal and conditional distributions across domains in unsupervised scenarios. A weight allocation mechanism for each source-domain sample is developed to suppress negative transfer. Two experimental datasets collected from laboratory test rigs are used as the target domains to validate the effectiveness of the proposed method. The results show that the proposed method is superior to other popular unsupervised cross-domain fault diagnosis methods.
The main topic of this paper is to analyse the approach to fault – finding, tests and maintenance regarding on what shall and shall not be done in an installation in hazardous area from the point of ...view of the explosion – protection safety. For a fault it is usual to be investigated by following a logical routine. This is one possible ways of proceeding developed from good engineering practice and experience in general terms. The test equipment for use in hazardous area will be either certified or uncertified. The maintenance is regarding in this paper from the point of view of SR EN 60079 – 17 starting from general requirements.
Memory test and repair has been generally applied to improve memory yield. However, due to the high cost of automatic test equipment (ATE) equipment, which has been employed for memory test and ...repair, there is a significant focus on reducing the ATE expense. One of the major problems, which contribute to the increase in ATE cost, is fail address memory. The size of fail address memory, where memory fault information is stored during the memory test, has continuously grown in line with the memory capacity increase. To address the problem, a new fail address memory architecture for cost-effective ATE is proposed in this paper. In the proposed architecture, memory fault information is compressed and unrequired memory fault information is eliminated. In addition, a new structure of fail address memory is used to efficiently store memory fault information. Accordingly, the size of fail address memory is highly reduced in the proposed architecture. Furthermore, since some information, which can be used during the memory repair, can be collected during the memory test, the redundancy analysis time required to find memory repair solutions is also reduced in the proposed architecture. The advantages were verified experimentally.
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