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Arai, Y.; Miyoshi, T.; Unno, Y.; Tsuboyama, T.; Terada, S.; Ikegami, Y.; Ichimiya, R.; Kohriki, T.; Tauchi, K.; Ikemoto, Y.; Fujita, Y.; Uchida, T.; Hara, K.; Miyake, H.; Kochiyama, M.; Sega, T.; Hanagaki, K.; Hirose, M.; Uchida, J.; Onuki, Y.; Horii, Y.; Yamamoto, H.; Tsuru, T.; Matsumoto, H.; Ryu, S.G.; Takashima, R.; Takeda, A.; Ikeda, H.; Kobayashi, D.; Wada, T.; Nagata, H.; Hatsui, T.; Kudo, T.; Taketani, A.; Kameshima, T.; Hirono, T.; Yabashi, M.; Furukawa, Y.; Battaglia, M.; Denes, P.; Vu, C.; Contarato, D.; Giubilato, P.; Kim, T.S.; Ohno, M.; Fukuda, K.; Kurachi, I.; Okihara, M.; Kuriyama, N.; Motoyoshi, M.
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment, 04/2011, Letnik: 636, Številka: 1Journal Article
A silicon-on-insulator (SOI) process for pixelated radiation detectors is developed. It is based on a 0.2 μm CMOS fully depleted (FD-)SOI technology. The SOI wafer is composed of a thick, high-resistivity substrate for the sensing part and a thin Si layer for CMOS circuits. Two types of pixel detectors, one integration-type and the other counting-type, are developed and tested. We confirmed good sensitivity for light, charged particles and X-rays for these detectors. For further improvement on the performance of the pixel detector, we have introduced a new process technique called buried p-well (BPW) to suppress back gate effect. We are also developing vertical (3D) integration technology to achieve much higher density.
