A novel approach to design low-power area-efficient rail-to-rail output single-stage class-AB operational transconductance amplifiers (OTAs) with enhanced large-and small-signal performance to drive large capacitive loads is presented. It is based on a non-linear nested current mirror at the active load of a splitted differential input pair biased in weak inversion that boosts dynamic currents beyond their quiescent value directly at the output branch. As a result, slew rate, DC gain, gain-bandwidth product, settling time and noise performance are improved without additional circuit elements or power consumption. An OTA prototype has been fabricated in a 180-nm CMOS process, consuming a quiescent power of 2.9 <inline-formula> <tex-math notation="LaTeX">\mu</tex-math> </inline-formula>W from a supply voltage of <inline-formula> <tex-math notation="LaTeX">\pm</tex-math> </inline-formula>0.5 V and a silicon area of 0.001 mm<inline-formula> <tex-math notation="LaTeX">^{2}</tex-math> </inline-formula>. Measurement results validate the advantages of the proposal, exhibiting positive and negative slew rates of 110 V/ms and <inline-formula> <tex-math notation="LaTeX">-</tex-math> </inline-formula>58 V/ms, respectively, and a gain-bandwidth product of 136 kHz with a phase margin of 90<inline-formula> <tex-math notation="LaTeX">^{\circ}</tex-math> </inline-formula> for a capacitive load of 160 pF.