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Deptuch, Grzegorz W.; Carini, Gabriella; Enquist, Paul; Grybos, Pawel; Hohn, Scott; Lipton, Ronald; Maj, Piotr; Patti, Robert; Siddons, David Peter; Szczygiel, Robert; Yarema, Raymond
IEEE transactions on electron devices, 01/2016, Letnik: 63, Številka: 1Journal Article
The vertically integrated photon imaging chip (VIPIC1) pixel detector is a stack consisting of a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed circuit board (PCB). The integrated circuit tiers were bonded using the direct bonding technology with copper, and each tier features 1-μm-diameter throughsilicon vias that were used for connections to the sensor on one side, and to the host PCB on the other side. The 80-μm-pixel-pitch sensor was the direct bonding technology with nickel bonded to the integrated circuit. The stack was mounted on the board using Sn-Pb balls placed on a 320-μm pitch, yielding an entirely wire-bond-less structure. The analog front-end features a pulse response peaking at below 250 ns, and the power consumption per pixel is 25 μW. A successful completion of the 3-D integration is reported. In addition, all pixels in the matrix of 64 x 64 pixels were responding on well-bonded devices. Correct operation of the sparsified readout, allowing a single 153-ns bunch timing resolution, was confirmed in the tests on a synchrotron beam of 10-keV X-rays. An equivalent noise charge of 36.2 e - rms and a conversion gain of 69.5 μV/e with 2.6 e - rms and 2.7 μV/e rms pixel-to-pixel variations, respectively, were measured.
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JCR | SNIP | JCR | SNIP | JCR | SNIP | JCR | SNIP |
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in: SICRIS
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