The effects of as-deposited (intrinsic) stress, externally applied (extrinsic) stresses, hardness, and modulus of various dielectric films on chemical-mechanical polishing (CMP) removal and post-CMP ...cleaning processes are studied in this article. Intrinsic stresses of the polished dielectrics do not contribute directly to the CMP removal rate. Extrinsic stresses including normal and shear components are calculated using principles of elasticity and fluid mechanics respectively and their roles in the material removal process are discussed. Theoretical evaluation and experimental results both suggest that hardness and modulus are the two most important material characteristics affecting the CMP process. Efficiency of post-CMP particle extraction can be monitored using an adhesion probability which is related to the hardness of wafer and pad. In addition, particle removal rate can be remarkably enhanced by increasing pressure (normal stress) while increasing pad rotation speed (shear stress) contributes little to reduce the particle count.
Near infrared silicon quantum dots MOSFET detector Jia-Min Shieh; Wen-Chien Yu; Chao-Kei Wang ...
2009 Conference on Lasers and Electro-Optics and 2009 Conference on Quantum electronics and Laser Science Conference
Conference Proceeding
Fully Si-based MOSFET photodetector was demonstrated at optical telecommunication wavelengths by using a gate dielectric stack comprising of a Si quantum dots film. Illumination at wavelengths ...lambda=1.55 mum, photoresponse as high as 2.0 A/W was measured.
Optical sum-frequency generation and ferroelectric-like switching in Si-O polar structures comprised of Si nanocrystals (nc-Si) in mesoporous silica was reported and attributed to polar layers lying ...at the interfaces between one-side bounded nc-Si and host.
A top-gate p-channel polycrystalline thin film transistor (TFT) has been fabricated using the polycrystalline silicon (poly-Si) film as-deposited by ultrahigh vacuum chemical vapor deposition ...(UHV/CVD) and polished by chemical mechanical polishing (CMP). In this process, long-term recrystallization in channel films is not needed. A maximum field effect mobility of 58 cm/sup 2//V-s, ON/OFF current ratio of 1.1 10/sup 7/, and threshold voltage of -0.54 V were obtained. The characteristics are not poor. In this work, therefore, we have demonstrated a new method to fabricate poly-Si TFT's.
A two-step etching has been performed to eliminate the plasma charging damages during helicon-wave plasma metal etching without selectivity loss. This technique utilized a normal etching recipe to ...remove the Al film followed by an optimized etching recipe for the overetching step. By increasing the bias power and decreasing the source power, the optimum etching recipe can target the plasma more directionally and reduce the Al charging damages. Eventually, the damage mechanism was also reported.
Synthesis and luminescence properties of CaNb
2O
6 oxides by the sol–gel process were investigated. The products were characterized by X-ray diffraction (XRD), scanning electron microscopy (SEM), ...high-resolution transmission electron microscopy (HRTEM), photoluminescence spectroscopy and absorption spectra. The PL spectra excited at 257
nm have a broad and strong blue emission band maximum at 457
nm, corresponding to the self-activated luminescence of the niobate octahedra group NbO
6
7−. The optical absorption spectra of the 700
°C sample exhibited the band-gap energies of 3.53
eV.
Chemical-mechanical polishing of blanket and patterned oxide films doped with phosphorus and boron has been studied. FTIR was used to characterize the film microstructure. Experimental results show ...that an increase of phosphorus level promoted the polish rate of PSG film. We also found that increasing the boron content enhanced the polish rate of BPSG films although phosphorus contents is decreased. This implies that boron is more effective than phosphorus in enhancing the polishing rate of BPSG films. However, the hardness of these doped films is slightly affected by doping level. Excellent planarity achieved by CMP is demonstrated for patterned wafers. Here, we also identify inversion patterns for the composite dielectric formed by a thin hard film on the top of a thick soft film. Such inversion phenomenon can be used for monitoring CMP process as a means of end point detection.
We describe a study on the effect of the electrostatic nature in silica particles on the post CMP cleaning behavior. A fall-off for the zeta potential of silica particles is observed as the pH of dip ...solutions is increased. In this study, we also observed that particle counts on the SiO
2 and the Si
3N
4 dielectric films had a similar dependence on the pH. Furthermore, we confirmed that surface hardness of the wafer is an important factor for particles physically embedded in different dielectric materials during and after the CMP process. The nanoscale surface hardness of dielectric films was measured by the nanoindentation technique. Experimental results showed that particles had difficulty attaching to a harder surface of the dielectric film.
Silicon-oxide-nitride-oxide-silicon devices with nanoparticles (NPs) as charge trapping nodes (CTNs) are important to provide enhanced performance for nonvolatile memory devices. To study these ...topics, the TiO@@i@@dx@@N@@i@@dy@@ metal oxide NPs embedded in the HfO@@i@@dx@@N@@i@@dy@@ high-k dielectric as CTNs of the nonvolatile memory devices were investigated via the thermal synthesis using Ti thin-film oxidized in the mixed O@@d2@/N@@d2@ ambient. Well-isolated TiO@@i@@dx@@N@@i@@dy@@ NPs with a diameter of 5-20 nm, a surface density of not, vert, similar3 x 10@@u11@ cm@@u-2@, and a charge trap density of around 2.33 x 10@@u12@ cm@@u-2@ were demonstrated. The writing characteristic measurements illustrate that the memory effect is mainly due to the @@ihole trapping@.
A novel technique, which uses Cl/sub 2//O/sub 2/ mixed gas in the electron cyclotron resonance (ECR) etching system, has been proposed to remove the antenna charging effect of the MOS capacitors with ...5-nm-thick oxides during polysilicon gate etching. The Cl/sub 2//O/sub 2/ can cause the trenching effect and prevents the gate oxide from the charging damage. Furthermore, the ECR system can provide high polysilicon/oxide selectivity so that the Si substrate under gate oxide is not directly bombarded by the ions. Consequently, the E/sub bd/ degradation of the MOS capacitors disappears as the trenching effect is apparent by using moderate Cl/sub 2//O/sub 2/ mixed gas.
