Four-Junction Wafer-Bonded Concentrator Solar Cells Dimroth, Frank; Tibbits, Thomas N. D.; Niemeyer, Markus ...
IEEE journal of photovoltaics,
2016-Jan., 2016-1-00, 20160101, Volume:
6, Issue:
1
Journal Article
Peer reviewed
Open access
The highest solar cell conversion efficiencies are achieved with four-junction devices under concentrated sunlight illumination. Different cell architectures are under development, all targeting an ...ideal bandgap combination close to 1.9, 1.4, 1.0, and 0.7 eV. Wafer bonding is used in this work to combine materials with a significant lattice mismatch. Three cell architectures are presented using the same two top junctions of GaInP/GaAs but different infrared absorbers based on Germanium, GaSb, or GaInAs on InP. The modeled efficiency potential at 500 suns is in the range of 49-54% for all three devices, but the highest efficiency is expected for the InP-based cell. An efficiency of 46% at 508 suns was already measured by AIST in Japan for a GaInP/GaAs//GaInAsP/GaInAs solar cell and represents the highest independently confirmed efficiency today. Solar cells on Ge and GaSb are in the development phase at Fraunhofer ISE, and the first demonstration of functional devices is presented in this paper.
The Silicon on Lattice Engineered Substrate (SOLES) platform enables monolithic integration of III-V compound semiconductor (III-V) and silicon (Si) complementary metal oxide semiconductor (CMOS) ...devices. The SOLES wafer provides a device quality Si-on-Insulator (SOI) layer for CMOS device fabrication and an embedded III-V device template layer which serves as a seed surface for epitaxial growth of III-V devices. In this work, different approaches for fabricating SOLES wafers comprised of Ge and InP template layers are characterized and InP-based SOLES structures are demonstrated for the first time. Ge-based SOLES are robust for long durations at temperatures up to 915°C and Ge diffusion can be controlled by engineering the oxide isolation layers adjacent to the Ge. InP SOLES structures alleviate lattice and thermal expansion mismatches between the template layer and subsequent device layers. Although allowable processing temperatures for these wafers had been expected to be higher due to the higher melting temperature of InP, high indium diffusion through the SiO2 and InP melting actually lead to lower thermal stability. This research elucidates approaches to enhance the process flexibility and wafer integrity of Ge-based and InP-based SOLES.
The next generation of multi-junction concentrator solar cells will have to reach higher efficiencies than today's devices. At the same time these solar cells must be reliable in the field, be ...manufacturable with good yield and at sufficiently low cost. Inevitably the request of higher efficiency requires four or even more junction devices. A four-junction solar cell combination of GaInP/GaAs//GaInAsP/GaInAs with bandgap energies of 1.9, 1.4, 1.1, 0.7 eV is developed in a close collaboration between the Fraunhofer ISE, Soitec, CEA-LETI and HZB. This 4-junction cell hits close to the optimum of theoretical efficiency contour plots and has the potential to reach efficiencies up to 50 % under concentration. Challenges are associated with lattice-mismatch between GaAs and InP which is overcome by direct wafer-bonding. The high cost of the InP is addressed by the use of engineered substrates which only require a 500 nm thin mono-crystalline InP layer instead of several hundred μm. Excellent solar cell results up to 44.7 % efficiency have been obtained under concentration for devices manufactured on InP bulk substrates. The high cell efficiency is also supported by out-door characterization of one cell below a Fresnel lens with 16 cm 2 aperture area. 38.5 % conversion efficiency has been measured for this mono-module in Freiburg under real operating conditions without any corrections.
Summary form only given. The highest solar cell conversion efficiencies are achieved with Four-junction devices under concentrated sunlight illumination. Different cell architectures are under ...development, all targeting an ideal bandgap combination close to 1.9 eV, 1.4 eV, 1.0 eV and 0.7 eV. Wafer bonding is used in this work to combine materials with a significant lattice-mismatch. Three cell architectures are presented using the same two top junctions of GaInP/GaAs but different infrared absorbers based on Germanium, GaSb or GaInAs on InP. The modelled efficiency potential at 500 suns is in the range of 49-54 % for all three devices but the highest efficiency is expected for the InP-based cell. An efficiency of 46 % at 508-suns was already measured by AIST in Japan for a GaInP/GaAs//GaInAsP/GaInAs solar cell and represents the highest independently confirmed efficiency today. Solar cells on Ge and GaSb are in the development phase at Fraunhofer ISE and first demonstration of functional devices is presented in this paper.
This paper presents an experimental analysis of the noise measurements performed in germanium on insulator (GeOI) 0.12 mum PMOS transistors. The front gate stack is composed of a SiO2/HfO2 material ...with a TiN metal gate electrode. The result is an aggressively reduced equivalent oxide thickness (EOT) of 1.8 nm. The buried oxide is used as a back gate for experimental purposes. Front gate and back gate oxides/Ge interfaces are characterized. The slow oxide trap densities of the two interfaces are extracted. The values obtained for the front gate oxide are N t (E Fn ) = 1.2 10 18 cm -3 eV -1 and are comparable to values for nitrided oxides on Si bulk. The extracted values for slow oxide trap densities of the SiO 2 /Ge interface are between 6 and 8 1017 cm -3 eV -1 and are close to those of state of art buried oxide SiO 2 /Si interfaces. These results are of importance for the future development of GeOI technologies.
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