The Espace Santé Jeune (ESJ) is a health education project conducted since 2008 in a French middle school. Pupils are invited to share their experiences about health in group speaking sessions led by ...a general practitioner (GP) accompanied by a municipal youth worker or a teacher. This study, based on the experience of the actors, seeks to understand the role of physicians and to identify the levers of the project.
A mixed method study was conducted from January to June 2015 by focus groups, individual interviews and questionnaire. Results of the inductive analysis by grounded theory methodology were compared to the quantitative results.
30 participants were included in the qualitative study (20 pupils, 5 teachers, 4 GP, 1 youth worker) and 107 pupils answered the questionnaire (71% response rate). The ESJ is a space centered on the speech of young people, experienced as a moment of freedom and appreciated by 70% of participants. The role of the GPs during the sessions oscillates between "animation of debates" and "expertise", and the complementarity of the competences with the educational professionals facilitates their intervention. Beyond the sessions, the presence of the GP is perceived as essential because their status brings a global legitimacy to the project. The intervention is based on the commitment of the professionals, the multi-professionality, the coordination and the sharing of a common culture for prevention.
The ESJ is an innovative experience encouraging the commitment of GPs in local public health actions.
The application-specific multiprocessor system-on-chip （MPSoC） architecture is becoming an attractive solution to deal with increasingly complex embedded applications, which require both high ...performance and flexible programmability. As an effective method for MPSoC development, we present a gradual refinement flow starting from a high-level Simulink model to a synthesizable and executable hardware and software specification. The proposed methodology consists of five different abstract levels： Simulink combined algorithm and architecture model （CAAM）, virtual architecture （VA）, transactional accurate architecture （TA）, virtual prototype （VP） and field-programmable gate array （FPGA） emulation. Experimental results of Motion-JPEG and H.264 show that the proposed gradual refinement flow can generate various MPSoC architectures from an original Simulink model, allowing processor, communication and tasks design space exploration.
Emerging embedded systems require heterogeneous multiprocessor SoC architectures that can satisfy both high-performance and programmability. However, as the complexity of embedded systems increases, ...software programming on an increasing number of multiprocessors faces several critical problems, such as multithreaded code generation, heterogeneous architecture adaptation, short design time, and low cost implementation. In this paper, we present a software code generation flow based on Simulink to address these problems. We propose a functional modeling style to capture data-intensive and control-dependent target applications, and a system architecture modeling style to seamlessly transform the functional model into the target architecture. Both models are described using Simulink. From a system architecture Simulink model, a code generator produces a multithreaded code, inserting thread and communication primitives to abstract the heterogeneity of the target architecture. In addition, the multithread code generator called LESCEA applies the extensions of dataflow based memory optimization techniques, considering both data and control dependency. Experimental results on a Motion-JPEG decoder and an H.264 decoder show that the proposed multithread code generator enables easy software programming on different multiprocessor architectures with substantially reduced data memory size (up to 68.0%) and code memory size (up to 15.9%).
The increasing number of cores integrated into modern processors is blurring the line between supercomputers and enterprise-grade servers. Therefore, the same attention to lock contention bottlenecks ...must be given to Java-based business workloads as it is given to massively parallel, high-performance computing applications, especially when it comes to characterizing global trends that would ease the transition of today's code base to tomorrow's parallel configurations. This paper first presents the characteristics of a typical Java-based business application software stack and examines the locking contentions that can appear at each level of that stack. Second, it presents scalability evaluation of three enterprise-grade, Java-based workloads and details the lock contention founds. Third, it summarizes the results of our findings, emphasizing the need for a streamlined methodology for lock-contention analysis of enterprise Java workloads.
As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and ...simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.
We present the architecture of a cloud native version of IBM Streams, with Kubernetes as our target platform. Streams is a general purpose streaming system with its own platform for managing ...applications and the compute clusters that execute those applications. Cloud native Streams replaces that platform with Kubernetes. By using Kubernetes as its platform, Streams is able to offload job management, life cycle tracking, address translation, fault tolerance and scheduling. This offloading is possible because we define custom resources that natively integrate into Kubernetes, allowing Streams to use Kubernetes' eventing system as its own. We use four design patterns to implement our system: controllers, conductors, coordinators and causal chains. Composing controllers, conductors and coordinators allows us to build deterministic state machines out of an asynchronous distributed system. The resulting implementation eliminates 75% of the original platform code. Our experimental results show that the performance of Kubernetes is an adequate replacement in most cases, but it has problems with oversubscription, networking latency, garbage collection and pod recovery.
HydraDB Wang, Yandong; Zhang, Li; Tan, Jian ...
Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis,
11/2015
Conference Proceeding
In this paper, we describe our experiences and lessons learned from building a general-purpose in-memory key-value middleware, called HydraDB. HydraDB synthesizes a collection of state-of-the-art ...techniques, including continuous fault-tolerance, Remote Direct Memory Access (RDMA), as well as awareness for multicore systems, etc, to deliver a high-throughput, low-latency access service in a reliable manner for cluster computing applications.
The uniqueness of HydraDB mainly lies in its design commitment to fully exploit the RDMA protocol to comprehensively optimize various aspects of a general-purpose key-value store, including latency-critical operations, read enhancement, and data replications for high-availability service, etc. At the same time, HydraDB strives to efficiently utilize multicore systems to prevent data manipulation on the servers from curbing the potential of RDMA.
Many teams in our organization have adopted HydraDB to improve the execution of their cluster computing frameworks, including Hadoop, Spark, Sensemaking analytics, and Call Record Processing. In addition, our performance evaluation with a variety of YCSB workloads also shows that HydraDB can substantially outperform several existing in-memory key-value stores by an order of magnitude. Our detailed performance evaluation further corroborates our design choices.
Cette dissertation montre que des applications embarquées complexes peuvent tirer partie efficacement de plateformes MP-SoC hétérogènes tout en respectant les critères de flexibilité, mise à ...l'échelle, portabilité et time-to-market. Elle fait la description d'un flot de conception de logiciel embarqué amélioré combinant un générateur de code, GECKO, et un environnement logiciel innovant, APES, afin d'obtenir un haut niveau d'efficacité. La contribution ainsi présentée est double : 1) un flot de conception de logiciel embarqué amélioré avec un ensemble d'outils permettant la construction automatique d'objets binaires minimaux pour une application donnée ciblant une plateforme MP-SoC donnée, et 2) un ensemble de composants logiciels modulaire et portable incluant des mécanismes de systèmes d'exploitations traditionnels ainsi que le support de multiples processeurs.
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