High spatial resolution monolithic pixel detector in SOI technology Bugiel, R.; Bugiel, S.; Dannheim, D. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
02/2021, Volume:
988
Journal Article
Peer reviewed
Open access
This paper presents test-beam results of monolithic pixel detector prototypes fabricated in 200 nm Silicon-On-Insulator (SOI) CMOS technology studied in the context of high spatial resolution ...performance. The tested detectors were fabricated on a 500 μm thick high-resistivity Floating Zone type n (FZ-n) wafer and on a 300 μm Double SOI Czochralski type p (DSOI Cz-p) wafer. The pixel size is 30 μm×30 μm and two different front-end electronics architectures were tested, a source follower and a charge-sensitive preamplifier. The test-beam data analyses were focused mainly on determination of the spatial resolution and the hit detection efficiency. In this work different cluster formation and position reconstruction methods are studied. In particular, a generalization of the standard η-correction adapted for arbitrary cluster sizes, is introduced. The obtained results give in the best case a spatial resolution of about 1.5 μm for the FZ-n wafer and about 3.0 μm for the DSOI Cz-p wafer, both detectors showing detection efficiency above 99.5%.
Large-scale physics experiments running at high interaction rates place a high demand on the data acquisition system (DAQ) responsible for transporting the data from the detector to the storage. The ...antiProton ANihilation at DArmstadt (PANDA) at the facility for anti-proton and ion research (FAIR) is one such experiment of the future that will not use fixed hardware triggers; instead, the event selection is based on real-time feature extraction, filtering, and high-level correlations. A firmware framework for such real-time data processing has been developed and tested with hardware setup for a PANDA Forward Tracker (FT) prototype. The solution is applicable for other detector subsystems based on the so-called Trigger Readout Board (TRB) data read-out system.
The CMS High-Granularity Calorimeter (HGCAL) imposes extremely challenging specifications for the front-end electronics: high dynamic range, low noise, high-precision time information and low power ...consumption, as well as the need to select and transmit trigger information with a high transverse and longitudinal granularity. HGCROC2 is the second prototype of the readout chip embedding almost all the final functionalities. It has 72 channels of the full analog chain: low noise and high gain preamplifier and shapers, a 10-bit 40 MHz SAR-ADC which provides the charge measurement over the linear range of the preamplifier, after the preamplifier saturation a discriminator and TDC provide the charge information from ToT (200 ns dynamic range and 50 ps binning), and a fast discriminator and TDC provide timing information to 25 ps accuracy. This paper reports on the performance in terms of noise, charge and timing, the DAQ and Trigger paths, as well as results from radiation qualification with total ionizing dose (TID) and heavy ions for single-event effects (SEE).
A new design of a detector plane of sub-millimetre thickness for an electromagnetic sampling calorimeter is presented. It is intended to be used in the luminometers LumiCal and BeamCal in future ...linear e
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collider experiments. The detector planes were produced utilising novel connectivity scheme technologies. They were installed in a compact prototype of the calorimeter and tested at DESY with an electron beam of energy 1–5 GeV. The performance of a prototype of a compact LumiCal comprising eight detector planes was studied. The effective Molière radius at 5 GeV was determined to be (8.1 ± 0.1 (stat) ± 0.3 (syst)) mm, a value well reproduced by the Monte Carlo (MC) simulation (8.4 ± 0.1) mm. The dependence of the effective Molière radius on the electron energy in the range 1–5 GeV was also studied. Good agreement was obtained between data and MC simulation.
The design and measurement results of an ultra-low power multi-channel fast 10-bit Analog-to-Digital Converter (ADC) ASIC, developed for readout systems in future particle physics experiments, are ...discussed. An 8-channel prototype with a PLL-based data serialization and a fast data transmission was designed and fabricated in a 130 nm CMOS process. The ADC converts analog data with sampling rates from about 10 kS/s to 40 MS/s, with power consumption proportional to sampling rate. The resulting Figure of Merit (FOM), for sampling rates 5-40 MS/s, is 35-42 fJ/conv.-step, per ADC channel. Similar power contribution is spent for fast data serialization and the largest contribution goes to data transmission. A wide spectrum of static and dynamic measurements confirm very good performance of this multi-channel ADC with ENOB ~9.2 bits, an excellent channel uniformity, and negligible crosstalk. The ADC works asynchronously and so it is not limited to systems with uniform time sampling. The ADC is designed using dynamic circuitry which eliminates static power consumption (except leakage), as a consequence it is ready for applications requiring power cycling.
A prototype of a luminometer, designed for a future
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collider detector, and consisting at present of a four-plane module, was tested in the CERN PS accelerator T9 beam. The objective of this ...beam test was to demonstrate a multi-plane tungsten/silicon operation, to study the development of the electromagnetic shower and to compare it with MC simulations. The Molière radius has been determined to be 24.0 ± 0.6 (stat.) ± 1.5 (syst.) mm using a parametrization of the shower shape. Very good agreement was found between data and a detailed Geant4 simulation.
The noise of a fast charge sensitive amplifier (CSA) with an input MOS transistor operating in the moderate inversion region is discussed. The MOS transistor operation in the moderate inversion ...region becomes especially important in multichannel readout systems where limited power dissipation is required. The ENC of a CSA followed by a fast shaper is usually dominated by the voltage noise of the input MOS transistor. We carried out noise minimization for such a CSA, searching for an optimum input transistor width. The analyses were made using a simplified EKV model and were compared to HSPICE simulations using a BSIM3v3 model. We considered several CMOS technology generations with minimum transistor gate length ranging from 0.13 mum to 0.8 mum. We studied the sensitivity of ENC to the input transistor width, and propose a simple formula to estimate the optimum transistor width, which is valid in a wide current density range.
A complete, general solution for collecting and processing data from gaseous tracking detectors in high-rate applications has been developed. The readout chain consists of front-end modules equipped ...with PASTTREC ASIC chips and trigger readout boards version 3 (TRBv3) as a readout platform. The platform is accompanied by dedicated control, monitoring, and data quality assessment software. The entire system has been evaluated with a tracking system based on straw detectors in laboratory and in-beam experiments. In this paper, we present key elements of the system as well as results of various tests. The measured PASTTREC operation characteristics and the TRBv3 specification used for the readout allow us to adapt and to integrate it to the existing HADES spectrometer and the PANDA detector, an experiment under construction, both located at the FAIR facility in Darmstadt.
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