In this work, we will address the opportunities of a hybrid III-V/CMOS technology for next generation wireless communication, beyond 5G, moving to operating frequencies above 100GHz. Challenges ...related to III-V upscaling and CMOS co-integration using 3D technologies will be discussed.
In this paper, we will discuss the progress that has been made in upscaling GaN and InP to a Si platform as well as making them CMOS and 3D compatible to enable the heterogeneous systems that will be ...needed for 5G mm-wave and 6G sub-THz frequencies for high-capacity wireless communication.
Rosmarinus officinalis L. is an aromatic plant which is widely used as an ornamental plant is used in the pharmaceutical and food industries, mainly due to its essential oil content. A lack of ...detailed characterisation of rosemary cultivars has stimulated this research on the evaluation of 15 selections of the Sardinian germplasm. After a preliminary phase (1996/1997) of identification, description and evaluation of 31 mother plants of the Sardinian territory, selected rosemary clones were planted in a repository located at the Experiment Station of the University of Sassari, in Oristano (Sardinia). In this paper, 15 selections of the repository are characterised in terms of morphological (plant habitus and vigour, leaf size) and phenological characters and of essential oil composition. The 15 selections evaluated in the repository had a high variability for plant habitus (compact, intermediate and upright) and vigour (low, medium and high), leaf size, and plant phenology. For instance, the selection CAG5 is compact, vigorous and blooms several times throughout the year, while ORS3 has an upright shape, medium vigour and blooms once a year. Essential oil content varied from 1.18% (VIG12) to 4.07% (ORS1). In addition, the essential oil composition was quite variable.
In this paper, we demonstrate GaAs/InGaP HBTs grown on a 300 mm Si substrate. A DC current gain of ~112 and breakdown voltage, BV CBO , of 10 V is achieved. The emitter-base and base-collector diodes ...show an ideality factor of ~1.2 and ~1.4, respectively. This demonstration shows the potential for enabling a hybrid III-V CMOS/ technology for 5G and mm-wave applications, not limited to GaAs but which can also be extended to InGaAs on a 300 mm Si substrate.
Two types of K+ channels have been identified in patches of plasma membrane of metathoracic extensor tibiae muscle fibres of adult locust, Schistocerca gregaria. One channel had a maximum conductance ...of 170 pS, fast open-closed kinetics, and a linear current/ voltage relationship. In inside-out patches it was activated by "internally applied" Ca2+, but at unexpectedly low levels (between 10(-10) and 10(-9)M). The other channel had a maximum conductance of 35 pS, slower open-closed kinetics, and was not activated by Ca2+. In cell-attached patches, its channel conductance measured in symmetrical salines was about three times greater for hyperpolarisations than for depolarisations. This inward rectification was proved to be due to block by intracellular Mg2+. For both channels, open probability (Po) and mean open time increased during depolarisations and decreased during hyperpolarisations, resulting in outward rectifications in terms of net current (I n, product of the single-channel current and Po). For both channels, the K+ conductance was 10 times greater than that for Na+. Internally applied tetraethylammonium or tetramethylammonium ions blocked both channels.
A novel technique of peak intensity evaluation of tightly focused femtosecond laser pulse is proposed. The method is based on numerical and experimental studies of electrons angular distribution at ...acceleration in the field of laser radiation interacting with low density (<10 16 cm −3 ) Helium. The possibility of laser pulse peak intensity estimation in each shot in range from 10 18 to 10 20 W/cm 2 is demonstrated.
Performance and complexity of next-generation communication systems can be enhanced by the realization of III-V materials on large-area Si substrates and their heterogenous integration with Si-CMOS. ...In this paper, a GaAs/InGaP HBT technology which is integrated on 300 mm Si substrates using nano-ridge engineering is described. DC and RF characterization of the devices is presented, and device characteristics are explained using physical modeling. The impact of nano-ridge sidewall on device DC performance is studied in detail. Further, a RF small-signal model applicable to these devices is proposed and guidelines for further improvements in RF performance are discussed.
In this work, we will address the opportunities and technology challenges related to next generation mobile communication. To enable the required data rates and reliability for 5G applications, Si ...CMOS will need to be complemented with new materials and device architectures like III-V or GaN devices to enable at the same time the targeted speed and power efficiency of these systems. Heterogeneous integration, either monolithic or using 3D integration, will be a key enabler to achieve this.
3D technologies for analog/RF applications Vandooren, A.; Parvais, B.; Witters, L. ...
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S),
2017-Oct.
Conference Proceeding
In this work, we will review possible technology options for next generation wireless communication. Next to the introduction of specific device architectures and materials, dissimilar from standard ...Si CMOS, the challenge will lie in the co-integration of these non-Si technologies with CMOS to enable power efficient systems with high performance, in this case high speed and output power, and reduced form factor. Next to monolithic integration, sequential 3D, currently been investigated for LOGIC density scaling, can be one of the enablers, allowing to combine technologies with very different needs at a finer grain and thus higher density than traditional 3D-SOC and 3D-IC technologies.
We review our recent studies of oxide traps in InGaAs MOS gate stacks for novel high-mobility n-channel MOSFETs. We discuss and correlate various trap characterization techniques such as Bias ...Temperature Instability, defect Capture-Emission-Time maps (applied here to InGaAs devices), Random Telegraph Noise, hysteresis traces, multi-frequency C-V dispersion, all performed on a variety of device test vehicles (capacitors, planar MOSFETs, finFETs, nanowires). Finally we demonstrate guidelines for developing sufficiently reliable IIIV gate stacks.
