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Wu, Yue-Ming; Kao, Yu-Hsien; Chu, Ta-Shun
IEEE transactions on very large scale integration (VLSI) systems, 2022-Jan., 2022-1-00, 20220101, Volume: 30, Issue: 1Journal Article
This article presents a frequency interleaved technique (FIT) that can be applied to add resonant peaks in the response of distributed amplifier (DA) for loss compensation and then a frequency-interleaved distributed amplifier (FIDA) that can achieve a high-gain and wide-bandwidth frequency response by summing multiple overlapping distinct-band frequency responses through a distributed configuration. A detailed discussion was introduced to verify the FIDA and a DA was implemented using the FIT. The reported 65-nm CMOS FIDA chip occupies an area of <inline-formula> <tex-math notation="LaTeX">0.9\times 0.95\,\,\text {mm}^{2} </tex-math></inline-formula> and achieves a 17.2 dB small-signal power gain, 2-68 GHz −3-dB bandwidth, gain bandwidth product (GBW) of 478 GHz, and gain ripple of less than 2 dB, while consuming 120 mW under 1.2 V.
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