Transition‐metal dichalcogenides (TMDCs) are an important class of two‐dimensional (2D) layered materials for electronic and optoelectronic applications, due to their ultimate body thickness, sizable and tunable bandgap, and decent theoretical room‐temperature mobility. So far, however, all TMDCs show much lower mobility experimentally because of the collective effects by foreign impurities, which has become one of the most important limitations for their device applications. Here, taking MoS2 as an example, the key factors that bring down the mobility in TMDC transistors, including phonons, charged impurities, defects, and charge traps, are reviewed. A theoretical model that quantitatively captures the scaling of mobility with temperature, carrier density, and thickness is introduced. By fitting the available mobility data from literature over the past few years, one obtains the density of impurities and traps for a wide range of transistor structures. It shows that interface engineering can effectively reduce the impurities, leading to improved device performances. For few‐layer TMDCs, the lopsided carrier distribution is analytically modeled to elucidate the experimental increase of mobility with the number of layers. From our analysis, it is clear that the charge transport in TMDC samples is a very complex problem that must be handled carefully. Transition‐metal dichalcogenides (TMDCs) are widely investigated for enhanced characteristics for electronics among next generation semiconductors. The understanding of charge transport in TMDCs is significant for further device applications. Through carefully analyzing the reported high performance MoS2 devices, this review provides a systematic theoretical and experimental path to optimize the device structure and improve device performance.