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Xin Lai; Cong Liu; Zhiying Wang; Quanyou Feng
2011 Seventh International Conference on Computational Intelligence and Security, 2011-Dec.Conference Proceeding
Several memory architectures have been proposed to enable TLS in multi-core system. Each has its own data dependence violation mechanism and speculative thread restart policy. And most of them use a global component to check data dependence violation. No analytical model has been proposed to compare the impact of different memory architectures on thread restarts and the global component processing delay. In this paper, we proposed analytical models for such comparison. The analytical models counts in: memory access frequency, data dependence violation checking mechanisms and thread restart policy. We derived the equation for the thread restart probability of an application & the processing delay of global components by use of probability theory and network calculus. The analytical results indicate three facts. First, the radical data dependence violation mechanism leads to much higher thread restart probability than the precise one. Second, the delayed restart policy reduces the total restarts dramatically. Third, global components will bottleneck if memory access is frequent or too many cores execute speculative threads at the same time.
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