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  • Interface oxide trap charac...
    Gyani, J.; Soliveres, S.; Martinez, F.; Valenza, M.; Le Royer, C.; Augendre, E.; Romanjek, K.; Drazek, C.

    2009 10th International Conference on Ultimate Integration of Silicon, 2009-March
    Conference Proceeding

    This paper presents an experimental analysis of the noise measurements performed in germanium on insulator (GeOI) 0.12 mum PMOS transistors. The front gate stack is composed of a SiO2/HfO2 material with a TiN metal gate electrode. The result is an aggressively reduced equivalent oxide thickness (EOT) of 1.8 nm. The buried oxide is used as a back gate for experimental purposes. Front gate and back gate oxides/Ge interfaces are characterized. The slow oxide trap densities of the two interfaces are extracted. The values obtained for the front gate oxide are N t (E Fn ) = 1.2 10 18 cm -3 eV -1 and are comparable to values for nitrided oxides on Si bulk. The extracted values for slow oxide trap densities of the SiO 2 /Ge interface are between 6 and 8 1017 cm -3 eV -1 and are close to those of state of art buried oxide SiO 2 /Si interfaces. These results are of importance for the future development of GeOI technologies.