Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC

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Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC

Camplani, A.; Dittmeier, S.; Annovi, A.; Axiotis, K.; Beccherle, R.; Biesuz, N.; Brenner, R.; Débieux, S.; Ellert, M.; Francavilla, P.; Giannetti, P.; Kordas, K.; Mårtensson, M.; Mastrandrea, P.; Noulas, C.; Oechsle, J.; Piendibene, M.; Poggi, R.; Schöning, A.; Sfyrla, A.; Sotiropoulou, C.L.; Steentoft, J.; Tsiakiris, T.; Xella, S.; Zinßer, J.

Journal of instrumentation, 06/2023, Volume: 18, Issue: 6

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