► Biasing the back interface in accumulation while extracting carrier mobility in FD-SOI MOSFETs leads to underestimated values. ► Apparent mobility degradation with decreasing film thickness in ultra-thin SOI MOSFET or Pseudo-MOSFET measurement is due to an additional component of the vertical electric field. ► In Pseudo-MOSFET measurements, the additional component of the vertical electric field comes from the traps and charges at the free-surface of the sample. ► We propose a new model to take this additional component of the vertical electric field into account. The mobility-thickness dependence in SOI films is clarified. Measurements in fully depleted SOI MOSFETs show that the low-field mobility at the front channel decreases by thinning the Si film or by sweeping the back gate from depletion into accumulation. We demonstrate that this mobility degradation is only apparent, being related to the potential value at the surface facing the channel. This opposite-surface potential induces an intrinsic vertical field which adds to the usual gate-related field. The mobility drop simply indicates a deviation from the low-field condition which cannot be achieved. We propose an updated model for proper extraction and interpretation of the low-field mobility. Pseudo-MOSFET results reveal the existence of a similar additional vertical field in bare SOI wafers, induced by charges present on the unpassivated surface. This intrinsic field increases in thinner films and affects pseudo-MOSFET conduction. The mobility decrease measured in SOI wafers with thinner films reflects the increasing impact of the intrinsic field and does not imply any degradation in quality of film-BOX interface.