E-resources
Peer reviewed
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Liu, Chien-Wei; Cheng, Chin-Lung; Chang-Liao, Kuei-Shu; Jeng, Jin-Tsong; Dai, Bau-Tong; Tsai, Chen-Pang
Microelectronic engineering, 2009, Volume: 86, Issue: 7Journal Article
Silicon-oxide–nitride-oxide–silicon devices with nanoparticles (NPs) as charge trapping nodes (CTNs) are important to provide enhanced performance for nonvolatile memory devices. To study these topics, the TiO x N y metal oxide NPs embedded in the HfO x N y high-k dielectric as CTNs of the nonvolatile memory devices were investigated via the thermal synthesis using Ti thin-film oxidized in the mixed O 2/N 2 ambient. Well-isolated TiO x N y NPs with a diameter of 5–20 nm, a surface density of ∼3 × 10 11 cm −2, and a charge trap density of around 2.33 × 10 12 cm −2 were demonstrated. The writing characteristic measurements illustrate that the memory effect is mainly due to the hole trapping.
