Memory accesses reduction for MIME algorithm Goel, S.; Shaaban, M.; Darwish, T. ...
2003 International Conference on Multimedia and Expo. ICME '03. Proceedings (Cat. No.03TH8698),
2003, Letnik:
2
Conference Proceeding
Power consumption of digital systems has become a critical design parameter. An important class of digital systems includes applications such as video image processing and speech recognition, which ...are extremely memory dominant. In such systems, a significant amount of power is consumed during memory accesses. Reducing the number of memory accesses can considerably impact the power dissipation in the rest of the design. Therefore, optimizing an application for reduced memory access can greatly effect the overall power consumption in the entire system. This paper presents an architectural enhancement multi-stage interval-based motion estimation (MIME) algorithm that not only saves power by reducing the number of memory accesses but also significantly increases the speedup.
We present an algorithmic enhancement of the full-search block-matching algorithm for motion estimation. The proposed algorithm reduces the computational load by successively eliminating noncandidate ...blocks from the search window. The elimination process uses low bit-resolution blocks and it is applied in two stages for motion vector computation. This computational reduction leads to enhanced performance in terms of low power consumption and fast motion vector estimation. A low power VLSI implementation of the algorithm is also presented. Simulation results show that the new algorithm, at an average, eliminates more than 88% of the candidate blocks in the search window.
This paper presents an exhaustive search algorithm for block matching motion estimation. The proposed algorithm reduces the computational load with successive elimination of non-candidate blocks in ...the search window. The proposed algorithm locates the global optima as located by the full search block-matching algorithm. This computational reduction leads to low-power VLSI implementation of the algorithm.. Also, it leads to faster efficient motion estimation procedure. The correctness of this algorithm and its complexity presented. Simulation results on benchmark video clips are presented.
