A cognitive image processing implementation for pattern-matching execution is proposed in this paper. It is based on the learning process of the human vision as an edge-enhancing filter for medical ...images. We set up an experiment to test its impact on the performance of decision-making algorithm working on brain magnetic resonance data. The execution times of similar filters can become unpractical on real 3-D or higher dimensional data, if implemented on a CPU. An innovative and high-performance embedded system for real-time pattern matching was developed. The design uses field-programmable gate arrays and the powerful associative memory chip (an ASIC) to achieve real-time performance and requires a training phase and a data acquisition phase. It is a very compact implementation that improves execution time ×1000 for the training phase and ×100 for the data acquisition phase for 2-D black and white images compared to a last generation i7 CPU. The implementation of this edge-enhancing filter is expected to positively impact on medical devices for real-time diagnosis (e.g., diagnostic ultrasound) and for image processing steps in medical image analysis where computing power is a limiting factor.
The associative memory (AM) system of fast tracker (FTK) processor has been designed for the tracking trigger upgrade to the ATLAS detector at the Conseil Europeen Pour La Recherche Nucleaire large ...hadron collider. The system performs pattern matching (PM) using the detector hits of particles in the ATLAS silicon tracker. The AM system is the main processing element of FTK and is mainly based on the use of application-specified integrated circuits (ASICs) (AM chips) designed to execute PM with a high degree of parallelism. It finds track candidates at low resolution which become seeds for a full resolution track fitting. The AM system implementation is based on a collection of large 9U Versa Module Europa (VME) boards, named "serial link processors" (AMBSLPs). On these boards, a huge traffic of data is implemented on a network of 900 2-Gb/s serial links. The complete AM-based processor consumes much less power (~50 kW) than its CPU equivalent and its size is much smaller. The AMBSLP has a power consumption of ~250 W and there will be 16 of them in a crate. This results in unusually large power consumption for a VME crate and the need for complex custom infrastructure in order to have sufficient cooling. This paper reports on the design and testing of the infrastructures needed to run and cool the system which will include 16 AMBSLPs in the same crate, the integration of the AMBSLP inside a first FTK slice, the performance of the produced prototypes (both hardware and firmware), as well as their tests in the global FTK integration. This is an important milestone to be satisfied before the FTK production.
The CDF Silicon Vertex Trigger Ashmanskas, Bill; Barchiesi, A.; Bardi, A. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
02/2004, Letnik:
518, Številka:
1
Journal Article
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The Collider Detector at Fermilab (CDF) experiment's Silicon Vertex Trigger (SVT) is a system of 150 custom 9U VME boards that reconstructs axial tracks in the CDF silicon strip detector in a
15
μs
...pipeline. SVT's
35
μm
impact parameter resolution enables CDF's Level 2 trigger to distinguish primary and secondary particles, and hence to collect large samples of hadronic bottom and charm decays. We review some of SVT's key design features. Speed is achieved with custom VLSI pattern recognition, linearized track fitting, pipelining, and parallel processing. Testing and reliability are aided by built-in logic state analysis and test-data sourcing at each board's input and output, a common interboard data link, and a universal “Merger” board for data fan-in/fan-out. Speed and adaptability are enhanced by use of modern FPGAs.
As the LHC luminosity is ramped up to 3 × 10 34 cm 2 s 1 and beyond, the high rates, multiplicities, and energies of particles seen by the detectors will pose a unique challenge. Only a tiny fraction ...of the produced collisions can be stored offline and immense real-time data reduction is needed. An effective trigger system must maintain high trigger efficiencies for the physics we are most interested in while suppressing the enormous QCD backgrounds. This requires massive computing power to minimize the online execution time of complex algorithms. A multi-level trigger is an effective solution to meet this challenge. The Fast Tracker (FTK) is an upgrade to the current ATLAS trigger system that will operate at full Level-1 output rates and provide high-quality tracks reconstructed over the entire inner detector by the start of processing in the Level-2 Trigger. FTK solves the combinatorial challenge inherent to tracking by exploiting the massive parallelism of associative memories that can compare inner detector hits to millions of pre-calculated patterns simultaneously. The tracking problem within matched patterns is further simplified by using pre-computed linearized fitting constants and relying on fast DSPs in modern commercial FPGAs. Overall, FTK is able to compute the helix parameters for all tracks in an event and apply quality cuts in less than 100 μs. The system design is defined and the performance presented with respect to high transverse momentum (high-p T ) Level-2 objects: b jets, tau jets, and isolated leptons. We test FTK algorithms using the full ATLAS simulation with WH events up to 3 × 10 34 cm 2 s 1 luminosity and compare the FTK results with the offline tracking capability. We present the architecture and the reconstruction performance for the mentioned high-p T Level-2 objects.
The authors describe a VLSI processor for pattern recognition based on content addressable memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. A large ...CAM bank stores all trajectories of interest and extracts the ones compatible with a given event. This task is naturally parallelized by a CAM architecture able to output identified trajectories, searching for matches on 96-bit wide patterns, in just a few 40-MHz clock cycles. We have developed this device (called the AMchip03 processor) for the silicon vertex trigger (SVT) upgrade at the Collider Detector experiment at Fermilab (CDF) using a standard-cell VLSI design methodology. This approach provides excellent pattern density, while sparing many of the complexities and risks associated to a full-custom design. The cost/performance ratio is better by well more than one order of magnitude than an FPGA-based design. This processor has a flexible and easily configurable structure that makes it suitable for applications in other experimental environments. They look forward to sharing this technology
A fast hardware tracker for the ATLAS trigger system Anderson, J.; Andreani, A.; Andreazza, A. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
08/2013, Letnik:
718
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The Fast Tracker (FTK) processor is an approved ATLAS upgrade that will reconstruct tracks using the full silicon tracker at Level-1 rate (up to 100KHz). FTK uses a completely parallel approach to ...read the silicon tracker information, execute the pattern matching and reconstruct the tracks. This approach, according to detailed simulation results, allows full tracking with nearly offline resolution within an execution time of 100μs. A central component of the system is the associative memories (AM); these special devices reduce the pattern matching combinatoric problem, providing identification of coarse resolution track candidates. The system consists of a pipeline of several components with the goal to organize and filter the data for the AM, then to reconstruct and filter the final tracks. This document presents an overview of the system and reports the status of the different elements of the system.
The Silicon Vertex Trigger upgrade at CDF Adelman, J.; Annovi, A.; Aoki, M. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
03/2007, Letnik:
572, Številka:
1
Journal Article
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The Silicon Vertex Trigger (SVT) in the CDF experiment at Fermilab performs fast and precise track finding and fitting at the second trigger level and has been a crucial element in data acquisition ...for Run II physics. However, as luminosity rises, multiple interactions increase the complexity of events and thus the SVT processing time, reducing the amount of data CDF can record. The SVT upgrade aims to increase the SVT processing power to restore the original CDF DAQ capability at high luminosity. We describe the SVT upgrade, consisting of a new Associative Memory 16 times larger than the existing one, and new faster Track Fitter and Hit Buffer boards to take advantage of these patterns. We describe the existing system, the upgrade, tests and performance.
The Fast Track processor (FTK) has been proposed for high-quality track finding at very high rates (Level-1 output rates) for the LHC experiments. Fast, efficient and precise pattern recognition has ...been studied using a silicon 7-layer sub-detector, including a subset of the pixel and SCT layers. We tested the FTK algorithms using the ATLAS full simulation. We compare the FTK reconstruction quality with the tracking capability of the offline iPatRec algorithm. We show that similar resolutions and efficiencies are reached by FTK at a speed higher than iPatRec by orders of magnitude. With FTK full events are reconstructed at the Level-1 output rate. B o s rarr mu + mu - events are fufly simuiated together with background samples. We show that a low Level-2 rate is allowed by FTK, even using a singie 6 GeV Level-1 muon selection trigger. FTK provides the full-resolution track list ready for the Level-2 BB o s identification. All selection cuts performed by the Event Filter can be easily anticipated at Level-2. We present the B o s rarr mu + mu - efficiency gain and related Level-2 rates.
We combine searches by the CDF and D0 Collaborations for the associated production of a Higgs boson with a W or Z boson and subsequent decay of the Higgs boson to a bottom-antibottom quark pair. The ...data, originating from Fermilab Tevatron pp collisions at √s = 1.96 TeV, correspond to integrated luminosities of up to 9.7 fb(-1). The searches are conducted for a Higgs boson with mass in the range 100-150 GeV/c(2). We observe an excess of events in the data compared with the background predictions, which is most significant in the mass range between 120 and 135 GeV/c(2). The largest local significance is 3.3 standard deviations, corresponding to a global significance of 3.1 standard deviations. We interpret this as evidence for the presence of a new particle consistent with the standard model Higgs boson, which is produced in association with a weak vector boson and decays to a bottom-antibottom quark pair.
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