Phase-change memory (PCM) is a promising non-volatile memory device due to its attractive properties such as fast access time and byte-addressability. However, PCM is still difficult to be used as a ...main memory because of its weakness in endurance and write disturbance. Conventional wear-leveling algorithms have attempted to handle short endurance, but they have not addressed the issue of write disturbance even though both issues are caused by write operations to PCM. This paper proposes a wear-leveling algorithm that addresses not only the endurance, but also the write disturbance. From the observation that the write disturbance errors and short endurance issues mostly take place in hot addresses, the proposed algorithm first detects hot addresses and maps them to 'hot' regions, which are customized memory regions designed to be robust to write disturbance errors and to support effective wear-leveling. The 'hot' region is not fixed to a specific part, but it moves over an entire memory space to make every cell belong to 'hot' regions in a uniform manner. On the other hand, cold addresses are mapped in 'normal' memory regions by simple linear mapping to reduce the hardware overhead. The proposed algorithm can reduce the write disturbance errors by more than 70% with only a slight instruction per cycle (IPC) degradation. Moreover, the wear-leveling performance is also enhanced by more than 3% compared to other wear-leveling algorithms.
In the latest large-screen TVs, an RGBW color domain is widely used to enhance the brightness of liquid crystal display (LCD) panels. As the correlations among RGBW color components are different ...from those among conventional RGB components, a compression algorithm developed for an RGB image may not be efficient for RGBW compression. For high-fidelity RGBW image coding, a novel prediction-based coding algorithm is proposed in this paper. The proposed algorithm is composed of two prediction steps that take advantage of spatial correlation and inter-color correlations, respectively. For residual coding, this paper proposes a fixed-ratio coding method based on Golomb-Rice coding. The proposed encoder is composed of two sub-coders: pre-coder and post-coder. The pre-coder estimates the length of the bitstream for various quantization levels. Based on that estimation, the appropriate quantization level is selected. The post-coder generates the final bitstream. Experimental results show that the average peak signal-to-noise ratio (PSNR) of the proposed algorithm is 51.16 dB. The throughput of the proposed encoder and decoder hardwares is 26.7 Gb/s, and their respective gate counts are 56.1 K and 39.6 K.
A Gram-stain-negative, aerobic, rod-shaped bacterial strain, designated MMS21-Ot14
, was isolated from a freshwater river, and shown to represent a novel species of the genus
on the basis of the ...results from a polyphasic approach. The 16S rRNA gene sequence analysis revealed that MMS21-Ot14
represented a member of the genus
of the family
and was closely related to
RHA2-9
(97.52 % sequence similarity),
THG A18
(97.46 %) and
P 461/12
(97.27 %). The optimal growth of MMS21-Ot14
occurred at 25-30 °C, pH 6.0-7.0 and in the absence of NaCl. MMS21-Ot14
was capable of hydrolysing casein, starch, DNA, Tween 20 and tyrosine. The strain also showed keratinolytic activity with keratin azure and decolourising activity with remazol brilliant blue R (RBBR), which indicated potential ability to degrade keratin and lignin. The main polar lipids of MMS21-Ot14
were phosphatidylethanolamine, unidentified aminophospholipids, unidentified aminolipids, an unidentified phospholipid and several unidentified lipids. The predominant fatty acids of MMS21-Ot14
were iso-C
and iso-C
3-OH, and the major isoprenoid quinone was menaquinone 6 (MK-6). The whole genome of MMS21-Ot14
was 5 062 016 bp in length with a DNA G+C content of 37.7 %. The average nucleotide identity and digital DNA-DNA hybridisation values between MMS21-Ot14
and phylogenetically related members of the genus
were well below the threshold values for species delineation. It is evident from the results of this study that MMS21-Ot14
should be classified as representing a novel species of the genus
, for which the name
sp. nov. (type strain, MMS21-Ot14
= KCTC 92255
= LMG 32529
) is proposed.
A rowhammer error represents a loss of data stored in a DRAM cell caused by electromagnetic interference due to repetitive access to the same and/or adjacent rows. Due to the concentrated occurrence ...of rowhammer errors in specific rows and columns, these errors cannot be corrected by the conventional error correcting code (ECC) commonly used in DRAM devices. Previous techniques avoid these errors by having additional refresh operations that require additional hardware resources and/or power consumption. This paper proposes a different approach to handle rowhammer errors by distributing them across different DRAM rows and columns so that the attack cells are not concentrated on specific rows and columns. To this end, the distribution of rowhammer errors is observed with experiments using several commercial DRAM devices by employing state-of-the-art rowhammer attack techniques. The observation of the rowhammer errors concentrated in specific rows and columns underlies the proposal of an effective DRAM address remapping scheme for re-distribution of rowhammer errors. By using different address mappings to different chips and arrays in a DIMM, the proposed remapping effectively distributes errors over different rows and columns. As a result, the proposed remapping scheme decreases the possibility of multiple errors in a single word, and consequently, reduces uncorrectable errors under single error or single symbol correcting ECC. Experimental results with commercial DIMMs show that the proposed scheme reduces uncorrectable errors by about 95 percent while incurring a small additional hardware cost.
Phase-change memory (PCM) is a non-volatile memory device with favorable characteristics such as persistence, byte-addressability, and lower latency when compared to flash memory. However, it ...comprises memory cells that have limited lifetime and higher access latency than DRAM. The row buffer size of a PCM is preferred to be larger than 128B to fill the latency gap between two memories and to reduce the metadata overhead incurred by wear leveling. As the cache line size in a general-purpose processor is 64B, a read-modify-write (RMW) module is required to be placed between the processor and the PCM, which in turn induces a performance degradation. To reduce such an overhead and enhance the reliability of a device, this paper presents a new RMW architecture. The proposed model introduces a DRAM cache in the RMW module, which minimizes redundant read operations for write operations by pre-fetching the entire transaction unit instead of merely caching the 64B requested data. Furthermore, a typeless merge operation is performed with the proposed cache by gathering multiple commands accessing consecutive addresses, irrespective of whether they are READ or WRITE. Simulation results indicate that the proposed method enhances the speed by 3.2 times and the reliability by 49 percent as compared to the baseline model.
Write disturbance error (WDE) appears as a serious reliability problem preventing phase-change memory (PCM) from general commercialization, and therefore several studies have been proposed to ...mitigate WDEs. Verify-and-correction (VnC) eliminates WDEs by always verifying the data correctness on neighbors after programming, but incurs significant performance overhead. Encoding-based schemes mitigate WDEs by reducing the number of WDE-vulnerable data patterns; however, mitigation performance notably fluctuates with applications. Moreover, encoding-based schemes still rely on VnC-based schemes. Cache-based schemes lower WDEs by storing data in a write cache, but it requires several megabytes of SRAM to significantly mitigate WDEs. Despite the efforts of previous studies, these methods incur either significant performance or area overhead. Therefore, a new approach, which does not rely on VnC-based schemes or application data patterns, is highly necessary. Furthermore, the new approach should be transparent to processors (i.e., in-module), because the characteristic of WDEs is determined by manufacturers of PCM products. In this paper, we present an in-module disturbance barrier (IMDB) that mitigates WDEs on demand. IMDB includes a two-level hierarchy comprising two SRAM-based tables, whose entries are managed with a dedicated replacement policy that sufficiently utilizes the characteristics of WDEs. The naive implementation of the replacement policy requires hundreds of read ports on SRAM, which is infeasible in real hardware; hence, an approximate comparator is also designed. We also conduct a rigorous exploration of architecture parameters to obtain a cost-effective design. The proposed method significantly reduces WDEs without noticeable speed degradation or additional energy consumption compared to previous methods.
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It was discovered that when the loading of the sulfur electrode is high, the utilization of the sulfur, which is controlled by the concentration of salt in the electrolyte, ...significantly increases with decreasing salt concentration.
Sulfur utilization improvement and control of dissolved lithium polysulfide (LiPS; Li2Sx, 2 < x ≤ 8) are crucial aspects of the development of lithium-sulfur (Li-S) batteries, especially in high-loading sulfur electrodes and low electrolyte/sulfur (E/S) ratios. The sluggish reaction in the low E/S ratio induces poor LiPS solubility and unstable Li2S electrodeposition, resulting in limited sulfur utilization, especially under high-loading sulfur electrode. In this study, we report on salt concentration effects that improve sulfur utilization with a high-loading cathode (6 mgsulfur cm−2), a high sulfur content (80 wt%) and a low E/S ratio (5 mL gsulfur−1). On the basis of the rapid LiPS dissolving in a low concentration electrolyte, we established that the quantity of Li2S electrodeposition from a high Li+ diffusion coefficient, referring to the reduction of LiPS precipitation, was significantly enhanced by a faster kinetic. These results demonstrate the importance of kinetic factors for the rate capability and cycle life stability of Li-S battery electrolytes through high Li2S deposition under high-loading sulfur electrode.
Printed electronics refers to the technology of fabricating electronic devices by applying the printing process method to thin films. Printed electronics is regarded as a promising industry of the ...future because of its relatively low cost, simple process, and high mass production capacity, which are all superior to existing manufacturing methods. Roll-to-roll printing is a suitable technology for printed electronics with large-scale and high-speed mass production. To commercialize roll-to-roll printing technology, it is necessary to develop technology for position control of the web, tension control of the web, printing pressure control, and functional ink development. Among them, the printing pressure uniformization by the printing pressure control is an important factor that significantly affects the printing quality. In the roll-to-roll printing process, the functional ink is transferred by the nip generated by the printing pressure. That is, if the nip can be kept uniform by applying the printing pressure uniformly, the uniformity of the line width and thickness of the printed pattern is improved. This nip occurs on a line connecting the geometric center of the two rolls, and the centers of the two rolls are on the orbit line by each roll runout. Therefore, the print pressure can be estimated through the change in the inter-center distance of the rolls caused by the roll runout. In this study, we propose a method of printing pressure uniformization using roll runout. After establishing initial conditions that minimize change in printing pressure, load cells are used to estimate and verify the initial conditions that minimized the change in the inter-center distance of rolls, and pressure sensitive paper is used to verify whether the actual printing pressure is minimized.
A set-associative cache organization is widely used to achieve a high hit-rate in modern caches, leading to a considerable enhancement in the system performance. In a conventional set-associative ...cache, tag and data arrays are simultaneously accessed to achieve fast access, but doing so causes a large amount of energy consumption. Previous attempts, such as way prediction and sequential tag access for energy reduction, are still associated with substantial energy consumption due to the tag access. This paper presents a new cache organization termed Segmented Tag Cache (STC), which reduces the amount of energy consumed during the tag access. The proposed organization initially implements a new tag organization that supports partial tag access. More specifically, the tag array is segmented into two parts, and partial tag access only reads low-order part of the tag. A cache access scheme suitable for the proposed tag organization then are developed. Under the scheme, the delay of the tag organization is hidden by the data access delay, avoiding an increase in the overall cache access time to be maintained. Simulation results show that the STC reduces the energy-delay product by approximately 58 percent compared to the conventional cache organizations with a negligible performance penalty.
The presence of Chlorine in the outer surface resulted in a highly electro-negative surface states and an increase in the vacuum energy level.
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•We investigated the influence of ...chlorine surface treatment on ITO properties.•Chlorination induced the change of the electro-static potential in the outer surface.•Chlorine electro-chemical treatment of ITO is a simple, fast and effective technique.
In this work, we investigate the influence of a chlorine-based electro-chemical surface treatment on the characteristics of indium tin oxide (ITO) including the work function, chemical composition, and phase transition. The treated ITOs were characterized using X-ray photoelectron spectroscopy (XPS), ultra-violet photoelectron spectroscopy (UPS), 4-point probe measurements, and grazing incidence X-ray diffraction (GI-XRD).
We confirmed a change of the chemical composition in the near-surface region of the ITO and the formation of indium-chlorine (In-Cl) bonds and surface dipoles (via XPS). In particular, the change of the electro-static potential in the outer surface was caused by chlorination.
Due to the vacuum-level shift after the electro-chemical treatment in a dilute hydrochloric acid, the ITO work function was increased by ∼0.43eV (via UPS); furthermore, the electro-negativity of the chlorine anions attracted electrons to emit them from the hole transport layer (HTL) to the ITO anodes, resulting in an increase of the hole-injection efficiency.
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