The linear front-end is the analog processor chosen for the final integration into the pixel readout chip for the high-luminosity upgrade of the CMS experiment at the large hadron collider. The ...front-end has been included in the RD53A chip, designed by the CERN RD53 collaboration and submitted in 2017. An optimized version of the front-end has been designed, submitted, and tested in the framework of the RD53B developments. The optimization is mainly concerned with the time-walk performance of the front-end and with its threshold tuning capabilities. The article describes in detail such design improvements together with the results from the characterization of a small prototype chip including a 16 <inline-formula> <tex-math notation="LaTeX">\times </tex-math></inline-formula> 16 pixel matrix featuring both the RD53A and RD53B versions of the front-end. Test results show a significant reduction, about 10 ns for input signals close to the threshold, of the time-walk in the RD53B front-end, featuring a threshold dispersion smaller than 65 electrons r.m.s. after exposure to a total ionizing dose of 1 Grad of X-rays.
A front-end channel prototype for pixel detectors has been designed for the upgrades of the HL-LHC experiments. The circuit is based on a Krummenacher feedback network to continuously reset the ...charge sensitive amplifier and on a fast threshold discriminator to implement a time-over-threshold (ToT) method and perform amplitude measurement. The front-end circuit was developed in a 65 nm CMOS technology and takes an overall area not exceeding 1250 μm 2 , i.e., half of the overall pixel area. The current consumption per channel is around 4 μA at VDD = 1.2 V. A very small charge sensitivity dispersion was detected in the set of characterized samples. An equivalent noise charge of 120 e - was found for a detector capacitance of 100 fF. The response of the channel is compatible with the speed requirements of the foreseen application in the innermost layers of the CMS pixel detector.
The General Antiparticle Spectrometer (GAPS) is an Antarctic balloon experiment designed for low-energy (0.1–0.3 GeV/n) cosmic antinuclei as signatures of dark matter annihilation or decay. GAPS is ...optimized to detect low-energy antideuterons, as well as to provide unprecedented sensitivity to low-energy antiprotons and antihelium nuclei. The novel GAPS antiparticle detection technique, based on the formation, decay, and annihilation of exotic atoms, provides greater identification power for these low-energy antinuclei than previous magnetic spectrometer experiments. This work reports the sensitivity of GAPS to detect antihelium-3 nuclei, based on full instrument simulation, event reconstruction, and realistic atmospheric influence simulations. The report of antihelium nuclei candidate events by AMS-02 has generated considerable interest in antihelium nuclei as probes of dark matter and other beyond the Standard Model theories. GAPS is in a unique position to detect or set upper limits on the cosmic antihelium nuclei flux in an energy range that is essentially free of astrophysical background. In three 35-day long-duration balloon flights, GAPS will be sensitive to an antihelium flux on the level of 1.3−1.2+4.5·10−6 m-2sr-1s-1(GeV/n)-1 (95% confidence level) in the energy range of 0.11–0.3 GeV/n, opening a new window on rare cosmic physics.
This work reports on the main results from the experimental characterization of the asynchronous analog front-end integrated in a 65 nm CMOS mixed-signal chip for the readout of high granularity ...silicon pixel sensors at the high-luminosity upgrades of the ATLAS and CMS experiments. Such a mixed-signal chip has been designed and submitted in the framework of the CHIPIX65 project, funded by the Italian Institute of Nuclear Physics for the development of an advanced pixel chip in a 65 nm CMOS technology. The project fits the program of the RD53 Collaboration, whose efforts led to the submission, in August 2017, of the large scale chip RD53A, integrating, among three different front-ends, an improved version of the analog processor discussed in this work. The main performance parameters of the asynchronous analog front-end, bump-bonded to a 3D sensor developed by FBK, are discussed in this work.
The General Antiparticle Spectrometer (GAPS) is an upcoming balloon mission to measure low-energy cosmic-ray antinuclei during at least three ∼35-day Antarctic flights. With its large geometric ...acceptance and novel exotic atom-based particle identification, GAPS will detect ∼500 cosmic antiprotons per flight and produce a precision cosmic antiproton spectrum in the kinetic energy range of ∼0.07−0.21GeV/n at the top of the atmosphere. With these high statistics extending to lower energies than any previous experiment, and with complementary sources of experimental uncertainty compared to traditional magnetic spectrometers, the GAPS antiproton measurement will be sensitive to dark matter, primordial black holes, and cosmic ray propagation. The antiproton measurement will also validate the GAPS antinucleus identification technique for the antideuteron and antihelium rare-event searches. This analysis demonstrates the GAPS sensitivity to cosmic-ray antiprotons using a full instrument simulation and event reconstruction, and including solar and atmospheric effects.
This paper discusses the main results relevant to the characterization of an analog front-end processor designed in view of experiments with unprecedented particle rates and radiation levels at the ...high-luminosity Large Hadron Collider (HL-LHC). The front-end channel presented in this paper is part of the CHIPIX65-FE0 prototype, a readout application-specified integrated circuit designed in a 65-nm CMOS technology in the frame of the CERN RD53 collaboration. The prototype integrates a <inline-formula> <tex-math notation="LaTeX">64\times 64 </tex-math></inline-formula> pixel matrix, divided into two <inline-formula> <tex-math notation="LaTeX">32\times 64 </tex-math></inline-formula> submatrices, featuring squared pixels with 50-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> pitch, embodying two analog front-end architectures based on synchronous and asynchronous hit discriminators. This paper is focused on the characterization of the array with asynchronous channels, before and after exposure to ionizing doses up to 630 Mrad(SiO 2 ) of X-rays. The analog chain takes a per-channel area close to 1000 <inline-formula> <tex-math notation="LaTeX">\mu \text{m}^{2} </tex-math></inline-formula>, with a power dissipation of around 5 <inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula>. The mean value of the equivalent noise charge, not significantly affected by radiation, is close to 100 electrons with no sensor connected to the front end. The threshold dispersion before irradiation is 55 electrons, for a tuned threshold of 600 electrons, with a moderate increase after irradiation. In-pixel analog-to-digital conversion, based on the time-over-threshold technique, is not appreciably influenced by the radiation as well. The assessed performance guarantees sub-1000 electrons stable threshold operations, which is a mandatory feature for highly efficient readout chips at the HL-LHC.
In future charged particle tracking systems, readout integrated circuits will be based on CMOS processes with minimum feature size in the 100 nm range. In nanoscale technologies, the reduction of the ...gate oxide thickness may lead to a non-negligible gate current due to direct tunneling phenomena. This leakage current, which is caused by discrete charges randomly crossing a potential barrier, yields an increase of the static power consumption for the digital section of the readout circuits and might degrade the noise performances of the analog front-end. As a consequence, in these advanced CMOS processes, an accurate characterization of the gate current noise is necessary in order to establish design criteria for detector analog front-end applications. This work presents the results of static and noise characterization of the gate-leakage current of NMOS devices belonging to a 90 nm commercial process. Data extracted from the measurements have been used to validate an analytical model for the gate current noise, which provides a useful tool for evaluating the impact of this noise source on the resolution limits achievable by low-noise charge amplifiers.
N- and P-type transistors from a 14 nm finFET technology have been tested from the standpoint of static current-voltage characteristics, small signal parameters and noise properties in view of analog ...front-end applications. Device electrical features are found to be compliant with the scaling trend as carried on with planar CMOS technologies. Comparison with standard, less scaled bulk CMOS processes points out that transition from planar, single-gate to vertical, multiple-gate structures does not affect significantly the device analog performance. The paper will focus in particular on the noise properties of the transistors, featuring different gate length and width and operated in the weak to moderate inversion region.
The impact of foundry-to-foundry variability and bias conditions during irradiation on the Total Ionizing Dose (TID) response of commercial 130-nm CMOS technologies have been investigated for ...applications in High Energy Physics (HEP) experiments. n- and p-channel MOSFETs from three different manufacturers have been irradiated with X-rays up to more than 100
Mrad (SiO
2). Even though the effects of TID are qualitatively similar, the amount of degradation is shown to vary considerably from foundry to foundry, probably depending on the processing of the STI oxide and/or doping profile in the substrate. The bias during irradiation showed to have a strong impact as well on the TID response, proving that exposure at worst case bias conditions largely overestimates the degradation a device may experience during its lifetime. Overall, our results increase the confidence that 130-nm CMOS technologies can be used in future HEP experiments even without Hardness-By-Design solutions, provided that constant monitoring of the radiation response is carried out during the full manufacturing phase of the circuits.
The focal-plane module is the key component of the DEPFET sensor with signal compression (DSSC) mega-pixel X-ray imager and handles the data of 128 <inline-formula> <tex-math ...notation="LaTeX">\times512 </tex-math></inline-formula> pixels. We report on assembly-related aspects, discuss the experimental investigation of bonding behavior of different adhesives, and present the metrology and electrical test results of the production. The module consists of two silicon (Si) sensors with flip-chip connected CMOS integrated circuits, a Si-heat spreader, a low-temperature co-fired ceramics circuit board, and a molybdenum frame. A low-modulus urethane-film adhesive fills the gaps between on-board components and frame. It is also used between board and heat spreader, reduces the misfit strain, and minimizes the module warpage very efficiently. The heat spreader reduces the on-board temperature gradient by about one order of magnitude. The placement precision of the bare modules to each other and the frame is characterized by a standard deviation below 10 and 65 <inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula>, respectively. The displacement due to the in-plane rotation and vertical tilting errors remains below 80 and 50 <inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula>, respectively. The deflection of the sensor plane shows a mean value below 30 <inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> with a standard deviation below 15 <inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula>. Less than 4% of the application-specified integrated circuits (ASICs) exhibit a malfunction. More than two-thirds of the sensors have a maximum leakage current below 1 <inline-formula> <tex-math notation="LaTeX">\mu \text{A} </tex-math></inline-formula>.
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