Understanding energy dissipation and transport in nanoscale structures is of great importance for the design of energy-efficient circuits and energy-conversion systems. This is also a rich domain for ...fundamental discoveries at the intersection of electron, lattice (phonon), and optical (photon) interactions. This review presents recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures. First, the landscape of power usage from nanoscale transistors (∼10
−8
W) to massive data centers (∼10
9
W) is surveyed. Then, focus is given to energy dissipation in nanoscale circuits, silicon transistors, carbon nanostructures, and semiconductor nanowires. Concepts of steady-state and transient thermal transport are also reviewed in the context of nanoscale devices with sub-nanosecond switching times. Finally, recent directions regarding energy transport are reviewed, including electrical and thermal conductivity of nanostructures, thermal rectification, and the role of ubiquitous material interfaces.
Two-dimensional layered materials like MoS2 have shown promise for nanoelectronics and energy storage, both as monolayers and as bulk van der Waals crystals with tunable properties. Here we present a ...platform to tune the physical and chemical properties of nanoscale MoS2 by electrochemically inserting a foreign species (Li+ ions) into their interlayer spacing. We discover substantial enhancement of light transmission (up to 90% in 4 nm thick lithiated MoS2) and electrical conductivity (more than 200×) in ultrathin (∼2–50 nm) MoS2 nanosheets after Li intercalation due to changes in band structure that reduce absorption upon intercalation and the injection of large amounts of free carriers. We also capture the first in situ optical observations of Li intercalation in MoS2 nanosheets, shedding light on the dynamics of the intercalation process and the associated spatial inhomogeneity and cycling-induced structural defects.
The scaling of transistors to sub-10 nm dimensions is strongly limited by their contact resistance (R C). Here we present a systematic study of scaling MoS2 devices and contacts with varying ...electrode metals and controlled deposition conditions, over a wide range of temperatures (80 to 500 K), carrier densities (1012 to 1013 cm–2), and contact dimensions (20 to 500 nm). We uncover that Au deposited in ultra-high vacuum (∼10–9 Torr) yields three times lower R C than under normal conditions, reaching 740 Ω·μm and specific contact resistivity 3 × 10–7 Ω·cm2, stable for over four months. Modeling reveals separate R C contributions from the Schottky barrier and the series access resistance, providing key insights on how to further improve scaling of MoS2 contacts and transistor dimensions. The contact transfer length is ∼35 nm at 300 K, which is verified experimentally using devices with 20 nm contacts and 70 nm contact pitch (CP), equivalent to the “14 nm” technology node.
We present a novel approach for computing the surface roughness-limited thermal conductivity of silicon nanowires with diameter D<100 nm. A frequency-dependent phonon scattering rate is computed from ...perturbation theory and related to a description of the surface through the root-mean-square roughness height Delta and autocovariance length L. Using a full phonon dispersion relation, we find a quadratic dependence of thermal conductivity on diameter and roughness as (D/Delta)(2). Computed results show excellent agreement with experimental data for a wide diameter and temperature range (25-350 K), and successfully predict the extraordinarily low thermal conductivity of 2 W m(-1) K-1 at room temperature in rough-etched 50 nm silicon nanowires.
A basic need in stretchable electronics for wearable and biomedical technologies is conductors that maintain adequate conductivity under large deformation. This challenge can be met by a network of ...one-dimensional (1D) conductors, such as carbon nanotubes (CNTs) or silver nanowires, as a thin film on top of a stretchable substrate. The electrical resistance of CNT thin films exhibits a hysteretic dependence on strain under cyclic loading, although the microstructural origin of this strain dependence remains unclear. Through numerical simulations, analytic models, and experiments, we show that the hysteretic resistance evolution is governed by a microstructural parameter ξ (the ratio of the mean projected CNT length over the film length) by showing that ξ is hysteretic with strain and that the resistance is proportional to ξ
−2. The findings are generally applicable to any stretchable thin film conductors consisting of 1D conductors with much lower resistance than the contact resistance in the high-density regime.
Reconfigurability of photonic integrated circuits (PICs) has become increasingly important due to the growing demands for electronic–photonic systems on a chip driven by emerging applications, ...including neuromorphic computing, quantum information, and microwave photonics. Success in these fields usually requires highly scalable photonic switching units as essential building blocks. Current photonic switches, however, mainly rely on materials with weak, volatile thermo‐optic or electro‐optic modulation effects, resulting in large footprints and high energy consumption. As a promising alternative, chalcogenide phase‐change materials (PCMs) exhibit strong optical modulation in a static, self‐holding fashion, but the scalability of present PCM‐integrated photonic applications is still limited by the poor optical or electrical actuation approaches. Here, with phase transitions actuated by in situ silicon PIN diode heaters, scalable nonvolatile electrically reconfigurable photonic switches using PCM‐clad silicon waveguides and microring resonators are demonstrated. As a result, intrinsically compact and energy‐efficient switching units operated with low driving voltages, near‐zero additional loss, and reversible switching with high endurance are obtained in a complementary metal‐oxide‐semiconductor (CMOS)‐compatible process. This work can potentially enable very large‐scale CMOS‐integrated programmable electronic–photonic systems such as optical neural networks and general‐purpose integrated photonic processors.
Nonvolatile electrically reconfigurable photonic switches based on phase‐change‐material‐clad silicon waveguides and microring resonators are demonstrated via in situ silicon PIN diode heaters. Low‐energy, compact, low‐loss, low‐voltage, and high‐cyclability operations at moderate speeds are obtained in a complementary metal‐oxide‐semiconductor‐compatible process, promising very large‐scale programmable electronic–photonic systems such as optical neural networks and general‐purpose integrated photonic processors.
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