The Timepix2 ASIC (application-specific integrated circuit) is the upgraded successor to the Timepix 1 hybrid pixel detector readout chip. Like the original, Timepix2 contains a matrix of 65k square ...pixels of 55 μm pitch that can be coupled to a similarly segmented semiconductor sensor, or integrated in an ionising gas detector. The pixels are programmable, with several operation modes and selectable counter depths (up to 18 bits for time-of-arrival, ToA, and up to 14 bits for time-over-threshold, ToT). In ToT and ToA mode, each pixel records the arrival time and energy deposited by particles interacting with the corresponding sensor segment, with an optional separation of timing resolution for ToT and ToA: down to 10 ns each. The gain of the frontend circuit can be programmed to adapt to the quantity of energy deposited in the sensor, yielding a large dynamic range of 0.38 ke− to 950 ke−. The frontend noise in adaptive gain mode is 380 e− rms. The design also introduces some power optimisation features to the Timepix portfolio, such as power masking on selectable parts of the pixel matrix. With all pixels powered on, using 100 MHz for both ToT and ToA clock frequencies, and assuming a sparse particle interaction with the pixels, the matrix is estimated to consume less than 900 mW based on simulation.
This manuscript describes the optimization of the front-end readout electronics for high granularity hybrid pixel detectors. The theoretical study aims at minimizing the noise and jitter. The model ...presented here is validated with both circuit post layout simulations and measurements on the Timepix4 Application Specific Integrated Circuit (ASIC). The analog front-end circuit and the procedure to optimize the dimensions of the main transistors are described with detail.
The Timepix4 is the most recent ASIC designed in the framework of the Medipix4 Collaboration. It was manufactured in 65nm CMOS process, and consists of a four side buttable matrix of 448 × 512 pixels with 55µm pitch. The analog front-end has a gain of ∼36mV/ke- when configured in High Gain Mode, and ∼20mV/ke- when configured in Low Gain Mode. The Equivalent Noise Charge (ENC) is ∼68e-rms and ∼80e-rms in High Gain Mode and in Low Gain Mode respectively. In event driven mode the incoming hits can be time stamped within a ∼ 200ps time bin and the chip can deal with a maximum flux of ∼ 3.6MHzmm−2s−1. In photon counting mode, the chip can deal with up to ∼ 5GHzmm−2s−1.
The routine designed to optimize the Timepix4 front-end is then used to analyze the performance limits in terms of jitter and noise for Charge Sensitive Amplifiers in pixel detectors.
X-ray imaging is a widely used imaging modality in the medical diagnostic field due to its availability, low cost, high spatial resolution, and fast image acquisition. X-ray photons in standard X-ray ...sources are polychromatic. Detectors that allow to extract the "color" information of the individual X-rays can lead to contrast enhancement, improved material identification or reduction of beam hardening artifacts at the system level, if we compare them with the widely spread energy integrating detectors. Today, in the field of computed tomography (CT), prototypes of clinical grade systems based on spectral photon counting detectors are currently available for clinical research from different companies. One of the key system components in that development is the X-ray photon detector. This article reviews the photon detection hardware, from the conversion of X-rays into electrical signals to the pulse processing electronics. A review of available photon counting application specific integrated circuits (ASICs) for spectroscopic X-ray imaging is presented with emphasis on the CT medical imaging application.
New architecture for the analog front-end of Medipix4 Sriskaran, V.; Alozy, J.; Ballabriga, R. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
10/2020, Letnik:
978
Journal Article
Recenzirano
The Medipix4 chip is the latest member of the family of Medipix pixel detector readout chips aimed at high rate spectroscopic X-ray imaging. Unlike its predecessors, it will be possible to tile the ...chip on all 4 sides permitting seamless large area coverage. This paper focuses on the development of the new Medipix4 front-end architecture capable of event-by-event data processing allowing accurate photon energy reconstruction, with charge sharing correction at an increased rate compared to Medipix3. The architecture is particularly well adapted for readout of pixelated high-Z detector materials allowing accurate energy binning of incoming hits at a fine pixel pitch. The new front-end architecture has a linear response up to 150 keV (CdTe), a count-rate capability up to 5.1×108 photons.mm−2s−1 for 10% dead time loss at 10 keV (CdTe) , and an energy resolution aiming for 2.2 keV FWHM (Full Width Half Maximum) at 60 keV (CdTe). The layout accommodates sensors with either 70μm or 140μm pitch of contacts.
•New architecture for the analog front-end of Medipix4.•Electronics to improve dynamic range, rate capability and energy resolution.•Photon processing with charge summing and single pixel arbitration mode.•Aim for spectroscopic X-ray imaging at rates compatible with medical CT scans.
This manuscript describes the optimization of the front-end readout electronics for high granularity hybrid pixel detectors. The theoretical study aims at minimizing the noise and jitter. The model ...presented here is validated with both circuit post layout simulations and measurements on the Timepix4 Application Specific Integrated Circuit (ASIC). The analog front-end circuit and the procedure to optimize the dimensions of the main transistors are described with detail. The Timepix4 is the most recent ASIC designed in the framework of the Medipix4 Collaboration. It was manufactured in 65nm CMOS process, and consists of a four side buttable matrix of 448 × 512 pixels with 55µm pitch. The analog front-end has a gain of ~36mV/ke- when configured in High Gain Mode, and ~20mV/ke- when configured in Low Gain Mode. The Equivalent Noise Charge (ENC) is ~68e-rms and ~80e-rms in High Gain Mode and in Low Gain Mode respectively. In event driven mode the incoming hits can be time stamped within a ~ 200ps time bin and the chip can deal with a maximum flux of ~ 3.6MHzmm–2s–1. In photon counting mode, the chip can deal with up to ~ 5GHzmm–2s–1. The routine designed to optimize the Timepix4 front-end is then used to analyze the performance limits in terms of jitter and noise for Charge Sensitive Amplifiers in pixel detectors.
Fast28 a low-power fast readout design for SiPMs in 28nm CMOS Piller, M.; Ballabriga, R.; Bandi, F. ...
2023 IEEE Nuclear Science Symposium, Medical Imaging Conference and International Symposium on Room-Temperature Semiconductor Detectors (NSS MIC RTSD),
2023-Nov.-4
Conference Proceeding
The field of detector readout electronics for precise timing has experienced a remarkable surge of interest due to its diverse range of applications in nuclear medicine such as Positron Emission ...Tomography (PET), High Energy Physics (HEP), Time-of-Flight (ToF) mass spectrometry and many other fields. This growth can be attributed to rapid advancements in photodetectors, particularly the silicon photomultiplier (SiPM), which has demonstrated exceptional suitability for these applications, owing to its ability to generate signals with unprecedentedly fast rise times. This work presents a low-power and high timing resolution readout front-end design for SiPMs in 28nm CMOS technology. With a low input impedance of less than 20Ω and a current-based input stage, it is suitable for a wide range of SiPM types and sizes. The power consumption of one timing channel is less than 2mW, and it achieves a sub-20ps r.m.s timing jitter for a single photo-electron, considering parasitic capacitances and inductances, with a 3x3mm 2 Hamamatsu SiPM S13360-3050CS at 4.5V over-voltage. These exceptional features make this front-end readout a promising candidate for numerous applications.
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