The priority of synaptic device researches has been given to prove the device potential for the emulation of synaptic dynamics and not to functionalize further synaptic devices for more complex ...learning. Here, we demonstrate an optic-neural synaptic device by implementing synaptic and optical-sensing functions together on h-BN/WSe
heterostructure. This device mimics the colored and color-mixed pattern recognition capabilities of the human vision system when arranged in an optic-neural network. Our synaptic device demonstrates a close to linear weight update trajectory while providing a large number of stable conduction states with less than 1% variation per state. The device operates with low voltage spikes of 0.3 V and consumes only 66 fJ per spike. This consequently facilitates the demonstration of accurate and energy efficient colored and color-mixed pattern recognition. The work will be an important step toward neural networks that comprise neural sensing and training functions for more complex pattern recognition.
Neuromorphic visual systems have considerable potential to emulate basic functions of the human visual system even beyond the visible light region. However, the complex circuitry of artificial visual ...systems based on conventional image sensors, memory and processing units presents serious challenges in terms of device integration and power consumption. Here we show simple two-terminal optoelectronic resistive random access memory (ORRAM) synaptic devices for an efficient neuromorphic visual system that exhibit non-volatile optical resistive switching and light-tunable synaptic behaviours. The ORRAM arrays enable image sensing and memory functions as well as neuromorphic visual pre-processing with an improved processing efficiency and image recognition rate in the subsequent processing tasks. The proof-of-concept device provides the potential to simplify the circuitry of a neuromorphic visual system and contribute to the development of applications in edge computing and the internet of things.
The insights contained in Gordon Moore's now famous 1965 and 1975 papers have broadly guided the development of semiconductor electronics for over 50 years. However, the field-effect transistor is ...approaching some physical limits to further miniaturization, and the associated rising costs and reduced return on investment appear to be slowing the pace of development. Far from signaling an end to progress, this gradual "end of Moore's law" will open a new era in information technology as the focus of research and development shifts from miniaturization of long-established technologies to the coordinated introduction of new devices, new integration technologies, and new architectures for computing.
In this paper, the recent progress of synaptic electronics is reviewed. The basics of biological synaptic plasticity and learning are described. The material properties and electrical switching ...characteristics of a variety of synaptic devices are discussed, with a focus on the use of synaptic devices for neuromorphic or brain-inspired computing. Performance metrics desirable for large-scale implementations of synaptic devices are illustrated. A review of recent work on targeted computing applications with synaptic devices is presented.
Phase-Change Memory-Towards a Storage-Class Memory Fong, Scott W.; Neumann, Christopher M.; Wong, H.-S Philip
IEEE transactions on electron devices,
2017-Nov., 2017-11-00, Letnik:
64, Številka:
11
Journal Article
Recenzirano
Odprti dostop
Phase-change memory (PCM) has undergone significant academic and industrial research in the last 15 years. After much development, it is now poised to enter the market as a storage-class memory ...(SCM), with performance and cost between that of NAND flash and DRAM. In this paper, we review the history of phase-transforming chalcogenides leading up to our current understanding of PCM as either a storage-type SCM, with high-density and better than NAND flash endurance, write speeds, and retention, or a memory-type SCM, with fast read/write times to function as a nonvolatile DRAM. Several of the key findings from the community relating to device dimensional scaling, cell design, thermal engineering, material exploration, and storing multiple levels per cell will be discussed. These areas have dramatically impacted the course of development and understanding of PCM. We will highlight the performance gains attained and the future prospects, which will help drive PCM to be as ubiquitous as NAND flash in the upcoming decade.
MoS₂ transistors with 1-nanometer gate lengths Desai, Sujay B.; Madhvapathy, Surabhi R.; Sachid, Angada B. ...
Science (American Association for the Advancement of Science),
10/2016, Letnik:
354, Številka:
6308
Journal Article
Recenzirano
Odprti dostop
Scaling of silicon (Si) transistors is predicted to fail below 5-nanometer (nm) gate lengths because of severe short channel effects. As an alternative to Si, certain layered semiconductors are ...attractive for their atomically uniform thickness down to a monolayer, lower dielectric constants, larger band gaps, and heavier carrier effective mass. Here, we demonstrate molybdenum disulfide (MoS₂) transistors with a 1-nm physical gate length using a single-walled carbon nanotube as the gate electrode. These ultrashort devices exhibit excellent switching characteristics with near ideal subthreshold swing of ~65 millivolts per decade and an On/Off current ratio of ~10⁶. Simulations show an effective channel length of ~3.9 nm in the Off state and ~1 nm in the On state.
Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using ...analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.
Neuromorphic computing is an emerging computing paradigm beyond the conventional digital von Neumann computation. An oxide‐based resistive switching memory is engineered to emulate synaptic devices. ...At the device level, the gradual resistance modulation is characterized by hundreds of identical pulses, achieving a low energy consumption of less than 1 pJ per spike. Furthermore, a stochastic compact model is developed to quantify the device switching dynamics and variation. At system level, the performance of an artificial visual system on the image orientation or edge detection with 16 348 oxide‐based synaptic devices is simulated, successfully demonstrating a key feature of neuromorphic computing: tolerance to device variation.
PDF
