A new nanoscale architecture of Fe3O4-carbon hybrid materials was developed by a vacuum incipient wetness procedure. The amount of Fe3O4 nanoparticles were controllably confined inside the cavity of ...the bowl-shaped hollow porous carbon nanocapsules (CNB). TEM images and TG curves proved that different loading of Fe3O4 small nanoparticles (NPs) with a diameter less than 50 nm were stored in CNB. Benefiting from the synergistic effect of the appropriate amount of uniformly dispersed Fe3O4 NPs and bowl-shaped carbon nano-capsules with high specific surface area, high conductivity and high amount of Nitrogen (N) and oxygen (O) elemental doping of Fe3O4@CNB, the new architecture provides good reversibility for the transport of electrolyte ions. When tested in supercapacitor devices, Fe3O4@CNB-2 (containing 40.3 wt% Fe3O4) exhibited the highest gravimetric (466 F g−1) and volumetric capacitance (624 F cm−3). The supercapacitors based on these materials also showed excellent cycling stability (92.4% capacitance retention after 5000 cycles). This class of Fe3O4-carbon hybrid materials has excellent electrochemical properties, and its synthesis strategy can be extended to construct other hybrid materials for various applications, such as biomedicine, catalysis, energy harvest, energy storage and so on.
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In this paper, analytical expressions and design equations are presented for a class-E amplifier with MOSFET nonlinear drain-source capacitance and linear gate-drain parasitic capacitance, along with ...external linear shunt capacitance. The class-E amplifier characteristics are presented as functions of the ratio of the sum of the external linear shunt capacitance and the MOSFET linear gate-drain capacitance to the MOSFET drain-source junction capacitance when the switch voltage is zero. Although the effect of the MOSFET linear gate-drain capacitance is similar to that of the external linear shunt capacitance on the design of the class-E amplifier with a square input voltage, the difference between their effects should be considered for the sinusoidal input voltage, which is one of the most important suggestions in this paper. Additionally, analytical expressions of the output power capability is given, which is considerably affected by the external linear shunt capacitance. Two design examples are presented, taking into account as design specification the output power of 8.7 W and the operating frequency of 4 MHz, along with the PSpice-simulations and experimental waveforms.
This paper presents a self-capacitance sensing system for proximity sensors with a wide offset capacitance range. Auto-calibration technique is adopted to compensate for the large sensor offset ...capacitance and achieve high sensitivity and dynamic range. Sensor capacitance is converted to a voltage by a capacitance-to-voltage (C/V) converter that performs conversions during both the charge and discharge phases of operation, which we call consecutive double-sided conversion. The conversion technique doubles the number of conversions compared to a conventional structure to improve power efficiency. The adjustment of an appropriate duty-cycle for the clock signal applied in the C/V converter and delta-sigma modulator reduces the power consumption. A prototype chip has been fabricated in a 0.13 μm CMOS technology. The analog circuits occupy an area of 0.264 mm 2 , dissipating 4.04 mW. It achieves an effective dynamic range of 105 dB in a conversion time of 4.1 ms when the offset capacitance is 215 pF.
The development of efficient materials for the generation and storage of renewable energy is now an urgent task for future energy demand. In this report, molybdenum disulphide hollow sphere (MoS
-HS) ...and its reduced graphene oxide hybrid (rGO/MoS
-S) have been synthesized and explored for energy generation and storage applications. The surface morphology, crystallinity and elemental composition of the as-synthesized materials have been thoroughly analysed. Inspired by the fascinating morphology of the MoS
-HS and rGO/MoS
-S materials, the electrochemical performance towards hydrogen evolution and supercapacitor has been demonstrated. The rGO/MoS
-S shows enhanced gravimetric capacitance values (318 ± 14 Fg
) with higher specific energy/power outputs (44.1 ± 2.1 Whkg
and 159.16 ± 7.0 Wkg
) and better cyclic performances (82 ± 0.95% even after 5000 cycles). Further, a prototype of the supercapacitor in a coin cell configuration has been fabricated and demonstrated towards powering a LED. The unique balance of exposed edge site and electrical conductivity of rGO/MoS
-S shows remarkably superior HER performances with lower onset over potential (0.16 ± 0.05 V), lower Tafel slope (75 ± 4 mVdec
), higher exchange current density (0.072 ± 0.023 mAcm
) and higher TOF (1.47 ± 0.085 s
) values. The dual performance of the rGO/MoS
-S substantiates the promising application for hydrogen generation and supercapacitor application of interest.
Capacitance-voltage (C-V) gate characteristics of power metal-oxide-semiconductor field-effect transistors ( mosfet s) play an important role in the dynamic device performance. C-V characterization ...of the mosfet gate structure is a necessary step for evaluating the mosfet switching behavior and calibrating lumped equivalent capacitances of mosfet compact models. This article presents a comprehensive analysis on gate C-V measurements of silicon (Si) and silicon carbide (SiC) power mosfet s leading to clear measurement guidelines. The requirements on the measurement setup, the selection of equivalent models used for the mosfet capacitance extraction, and the measurement frequency range are defined and supported by an accurate C-V characterization of several Si- and SiC power mosfet s. The results show that the gate-source and gate-drain capacitances should be extracted at a frequency of some 10 kHz rather than at 1 MHz, as typically adopted in datasheets, to avoid parasitic effects introduced by the measurement setup and package. Furthermore, analytical expressions for <inline-formula><tex-math notation="LaTeX">C_\text{dg}</tex-math></inline-formula> and <inline-formula><tex-math notation="LaTeX">C_\text{sg}</tex-math></inline-formula> were derived based on a lumped equivalent circuit, which explain the influence of the measurement setup and the package parasitics on the C-V measurements. Nonideal measurement conditions are identified and correlated to the differences in C-V extraction with either parallel or series-equivalent model. A new method is proposed to estimate the ratio of the mosfet 's on -state resistance components <inline-formula><tex-math notation="LaTeX">R_\text{ch}</tex-math></inline-formula> and <inline-formula><tex-math notation="LaTeX">R_\text{drift}</tex-math></inline-formula> based on the presented C-V measurement guidelines, which are applicable to all three- and four-terminal power mosfet s.
Capacitors are one type of reliability-critical components in power electronic systems. In the last two decades, many efforts in academic research have been devoted to the condition monitoring of ...capacitors to estimate their health status. Industry applications are demanding more reliable power electronics products with preventive maintenance. Nevertheless, most of the developed capacitor condition monitoring technologies are rarely adopted by industry due to the complexity, increased cost, and other relevant issues. An overview of the prior-art research in this area is therefore needed to justify the required resources and the corresponding performance of each key method. It serves to provide a guideline for industry to evaluate the available solutions by technology benchmarking, as well as to advance the academic research by discussing the history development and the future opportunities. Therefore, this paper first classifies the capacitor condition monitoring methods into three categories, then the respective technology evolution in the last two decades is summarized. Finally, the state-of-the-art research and the future opportunities targeting for industry applications are given.
Two means can be used to improve the data acquisition rate of the electrical capacitance tomography (ECT) system with a fixed excitation frequency, i.e., improving the capacitance measurement speed ...or changing the capacitance measurement mode from serial to parallel. This paper presents a newly developed high-speed ECT system by combing digital recursive demodulation and parallel-mode capacitance measurement methods. By using the digital recursive demodulator, the time-cost for one time of capacitance measurement can be one period of the excitation sinusoid or less. By using the parallel-mode capacitance measuring unit, capacitances between the exciting electrode and all other measuring electrodes can be measured simultaneously. The data acquisition rate of the parallel-mode ECT system with a sensor of N electrodes is N-1 times of a traditional serial-mode ECT system with the same excitation frequency. When the excitation frequency is 100 kHz and 0.6 periods of data are used for signal demodulation, the data acquisition rate can reach up to 15 150 frames/s. The developed system together with a heat-resisting circular ECT sensor with 12 electrodes was used to monitor the ignition process of a cylindrical flame generated by a Bunsen burner. Experimental results show that the ECT system can locate the position and capture the dynamic process of the flame with a high temporal resolution.
This work presents an approach to extract and analytically model the components of the parasitic capacitance in the Nanosheet FETs. The model comprehensively accounts for parallel, fringing, and ...junction capacitance between the gate and the source/drain. The individual parasitic capacitance components are extracted from TCAD simulation by varying the structural and material parameters of the device, which are then used for model validation. The fringing parasitic capacitance components are modeled using the elliptical integral method based on the distribution of the electric field lines. The proposed model accurately incorporates the substantial (<inline-formula> <tex-math notation="LaTeX">\sim </tex-math></inline-formula>30%) contribution of junction capacitance to the total parasitic capacitance. The model uses only one fitting parameter and is accurate across the device structural variations with only <inline-formula> <tex-math notation="LaTeX">\sim </tex-math></inline-formula>1.2% error.
•Overview of capacitance measurement circuits including recent developments.•Comparison of measurement circuits for lossy 1 pF to 1 nF capacitance in terms of measurement time, and ...accuracy.•Consideration of the influence of conductance loss and stray capacitance on measurement techniques.
The rising use of capacitive sensors imposes the need of numerous measuring circuits with different characteristics. Stray fields and conductance losses are thereby key influencing factors that must be taken into account. In this paper, we provide an actual overview of capacitance measurement circuits considering well-known and modern measurement methods, such as lock-in amplifier, relaxation methods, and Martin-based oscillators as well as completely novel classes of capacitance measurement circuits converting the capacitance value directly to digital signals via sigma-delta and dual-slope converter circuit architectures. We classify the capacitance measurement circuits into six categories and address their properties and implementation aspects and compare their performance in a wide the capacitance range. The comparison shows that immunity to stray capacitances and conductive losses is not always given. Capacitance-to-Voltage, Auto-Balancing Bridge, and Capacitance-to-Digital show the best performance in this aspect and are therefore relevant for use in dielectric spectroscopy.
Parasitic capacitances in transformers consist of three main groups: winding-to-winding, layer-to-layer, and stray capacitances. Stray capacitance is also made of turn-to-turn and turn-to-core ...capacitances. This study presents a novel analytical method for calculating the values of turn-to-turn, turn-to-core, and stray capacitances in each winding, and employs the results to calculate the equivalent parasitic capacitance especially for high-voltage switching transformers. The proposed analytical method introduces an explicit formula in terms of the winding and core dimensions. This formula can be applied in performance analysis and design optimisation methods. By utilising the proposed formula, calculation of the equivalent parasitic capacitance neither takes a great deal of time nor requires a particular computer system. The analytical results are verified by simulation results using the finite-element method and experimental results achieved by a practical prototype of a high-voltage switching transformer employed in a 390 W, 15 kV inductor–capacitor–inductor–capacitor resonant converter.
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