The 1.2-kV-rated 4H-SiC planar split-gate (SG) MOSFET embedding source field plate incorporated between separated gates (termed SFP-SG-MOSFET) is proposed and demonstrated. The utilization of the embedding source field plate in conventional SG-MOSFET (Conv-SG-MOSFETs) serves to alleviate the adverse effects of electric field crowding. It also maintains the minimum reverse transfer capacitance (<inline-formula> <tex-math notation="LaTeX">\textit{C}_{\text{rss}}\text{)}</tex-math> </inline-formula>. As a result, the high-frequency figure-of-merit (HF-FOM) and switching efficiency of the proposed SFP-SG MOSFET are improved compared to those of a conventional planar-gate MOSFET (Conv-PG-MOSFET) while maintaining the same blocking voltage rating. The experimental results demonstrate that <inline-formula> <tex-math notation="LaTeX">\textit{C}_{\text{rss}}</tex-math> </inline-formula> of the fabricated devices is reduced by 80% and 53% at <inline-formula> <tex-math notation="LaTeX">\textit{V}_{\text{ds}}</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">=</tex-math> </inline-formula> 0 V and <inline-formula> <tex-math notation="LaTeX">\textit{V}_{\text{ds}}</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">=</tex-math> </inline-formula> 800 V, respectively. Thus, the SFP-SG-MOSFET exhibits HF-FOMs <inline-formula> <tex-math notation="LaTeX"><</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">\textit{R}_{\text{ON}}</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">\times</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">\textit{C}_{\text{rss}}</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">></tex-math> </inline-formula> 4.9 times lower at <inline-formula> <tex-math notation="LaTeX">\textit{V}_{\text{ds}}</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">=</tex-math> </inline-formula> 0 V and 2.0 times lower at <inline-formula> <tex-math notation="LaTeX">\textit{V}_{\text{ds}}</tex-math> </inline-formula> <inline-formula> <tex-math notation="LaTeX">=</tex-math> </inline-formula> 800 V. Furthermore, the switching loss of the SFP-SG-MOSFET is reduced by 25%. This makes it possible for the proposed devices to handle a higher power density.