It is highly desirable to monolithically integrate a high-performance freewheeling diode (FWD) in both Si and SiC power MOSFETs for power electronic applications. This is especially true for a SiC MOSFET since its inherent body diode has a very large turn-on knee voltage (~2.7 V). The purpose of this numerical study is to investigate a new 1200 V SiC MOSFET structure with an integrated heterojunction diode formed between n-type polysilicon and n-type SiC (termed HJD-MOSFET). The proposed HJD-MOSFET uses a mesa structure to accommodate the heterojunction FWD without sacrificing any active area while leaving the split-gate planar MOSFET cells in the trench. A p-shield region surrounding the heterojunction, along with the p-base of the MOS cells, shields high electric fields and maintains a high breakdown voltage. Three key HJD-MOSFET device parameters are identified and optimized in this article. The HJD-MOSFET offers a turn-on knee voltage of 0.5 V, roughly five times lower than the intrinsic SiC body diode or two times lower than a typical SiC Schottky barrier diode due to the low barrier height of the n/n heterojunction (~0.68 eV). Finally, the gate charge of HJD-MOSFET is reduced by 42% compared with conventional MOSFET since the poly-Si gate electrode is significantly reduced to accommodate the heterojunction FWD.