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  • Coherency Hub Design for Mu...
    Feehrer, John; Rotker, Paul; Shih, Milton; Gingras, Paul; Yakutis, Peter; Phillips, Stephen; Heath, John

    IEEE MICRO, 07/2009, Letnik: 29, Številka: 4
    Journal Article

    CoHub, a coherency hub ASIC, provides a cost-effective way to extend a glueless two-node chip-multithreading system to a four-node system without changes to the processor. The four-node, 256-thread system achieves near-linear scaling of performance with thread count on transaction-processing workloads. Time-to-market pressure, 800-MHz operation, and a six-stage pipeline were among the constraints that shaped CoHub's design. PUBLICATION ABSTRACT