The paper suggests a design of radiation sensors based on metal-oxide-semiconductor (MOS) structures and p-channel radiation sensitive field effect transistors (RADFET) which are capable to function ...under conditions of high-field tunnel injection of electrons into the dielectric. We demonstrate that under these conditions, the dose sensitivity of the sensor can be significantly raised, and, besides, the intensity of radiation can be monitored in situ on the basis of determining the ionization current arising in the dielectric film. The paper proposes the model allowing to make a quantitative analysis of charge effects taking place in the radiation MOS sensors under concurrent influence of ionization radiation and high-field tunnel injection of electrons. Use of the model allows to properly interpret results of the radiation control. In order to test the designed sensors experimentally, we have utilized γ-rays, α-particle radiation, and proton beams. We have acquired experimental results verifying the enhancement of function capabilities of the radiation MOS sensors when these have been under high-field injection of electrons into the dielectric.
In this paper, we discuss reaction-diffusion processes in porous catalyst granules of spherical, cylindrical, and lamellar forms for various types of chemical reactions. We obtain approximate ...solutions of the quasi-homogeneous model for general catalytic reactions. Also, we analyze necessary conditions for the appearance of a “dead zone” in the central domain of a porous catalyst granule in the case of a general catalytic reaction.
Herein, a novel technique to monitor the quality and reliability of thin nano‐scale dielectric films is suggested. The method is based on the modification of the current stress technique (J‐Ramp) ...described in the corresponding JEDEC standard. The proposed technique, in addition to the J‐ramp tests, allows monitoring a change of charge state of the gate dielectric during all the tests. To implement this, in the suggested method before each transition to a higher current level, the current level is switched to the injection mode by a measurement current level and the change of voltage across the metal–insulator–semiconductor (MIS) structure is measured. A density of the measurement current level is chosen based on the condition that under this current level, a considerable charge degradation of the dielectric should not be observed, and the switches to the measurement current level should not considerably influence the studied sample. In addition to the monitoring of the charge injected until the dielectric breakdown, the proposed method allows to monitor the value of the injected charge at which the unacceptable degradation of MIS device characteristics takes place and, accordingly, to estimate the reliability of the dielectric film based on statistical measurements of these values.
Herein, a novel technique to monitor electro‐physical characteristics of metal–insulator–semiconductor (MIS) devices and control their charge state is proposed. The suggested method is based on a JEDEC standard method, which is the current stress technique (J‐Ramp). The proposed method gives the capability to predict the malfunction of MIS devices at an earlier stage in comparison with the J‐Ramp.
Electron microscopy is used to study the evolution of microstructure of copper–aluminum composites, which takes place as the degree of reduction upon rotary swaging increases, and their conductivity ...is measured. The effect of reinforcing the copper–aluminum composites with steel fibers on the conductivity is studied.
We propose a technique for the wafer-level testing of the gate dielectrics of metal–insulator–semiconductor (MIS) devices by the high-field injection of electrons into the dielectric using a mode of ...increasing injection current density up to a set level. This method provides the capability to control a change in the charge state of the gate dielectric during all the testing. The proposed technique makes it possible to assess the integrity of the thin dielectric and at the same time to control the charge effects of its degradation. The method in particular can be used for manufacturing processes to control integrated circuits (ICs) based on MIS structures. In the paper, we propose an advanced algorithm of the Bounded J-Ramp testing of the gate dielectric and receive its approval when monitoring the quality of the gate dielectrics of production-manufactured MIS devices. We found that the maximum value of positive charge obtained when tested by the proposed method was a value close to that obtained when the charge was injected into the dielectric under a constant current with a Bounded J value despite large differences in the rate of degradation of the dielectric.
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The paper proposes a novel technique of time depend dielectric breakdown for the wafer-level testing of thin dielectric of MIS devices based on concatenation of J-Ramp and Bounded J-Ramp methods. ...The suggested method enhances the existing method capabilities by introducing measurement injection modes. When DUT is under the measurement mode, the charge injection into the gate dielectric is realized under constant current density
J
m
at which any significant charge degradation of dielectric is not observed. Introduction of the measurement modes give an opportunity to monitor a change of the charge state of thin gate dielectric during all the test. The suggested test is started similar to Bounded J-Ramp method and then in order to raise the monitoring speed, the value of bounded current
J
b
could be step wisely increased over certain time intervals which are much longer in time in comparison with J-Ramp method. As a result, the charge injection into the gate dielectric could be implemented under multiple
J
b
values. This test algorithm gives an opportunity to greatly enhance functional capabilities of the existing test methods and the suggested technique raises speed to test.
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