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Ravi, A.; Madoglio, P.; Hongtao Xu; Chandrashekar, K.; Verhelst, M.; Pellerano, S.; Cuellar, L.; Aguirre-Hernandez, M.; Sajadieh, M.; Zarate-Roldan, J. E.; Bochobza-Degani, O.; Lakdawala, H.; Palaskas, Y.
IEEE journal of solid-state circuits, 12/2012, Volume: 47, Issue: 12Journal Article, Conference Proceeding
A digital outphasing transmitter is presented for 2.4-GHz WiFi. The transmitter consists of two delay-based phase modulators and a 26-dBm integrated switching class-D power amplifier. The delay-based phase modulator delays incoming LO edges with a resolution of 1.4 ps (8 bit) required to meet WiFi requirements. A phase MUX architecture is proposed to implement switching between phases once every LO period (2.4 GHz) without generating detrimental glitches at the output. Due to its open-loop nature, the proposed phase modulator is capable of delivering wide OFDM bandwidths up to 40 MHz. The paper analyzes the impact of impairments, e.g., delay mismatch within the delay cells and outphasing mismatches, as well as associated mitigation techniques. The transmitter has been implemented in a 32-nm digital CMOS process and delivers an OFDM average power of 20 dBm with an overall system efficiency of 18.6% when transmitting 54-Mb/s 64QAM signal. The fully digital design is expected to further improve in power dissipation and chip-area with further CMOS scaling.
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