E-resources
Peer reviewed
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Lakdawala, H.; Schaecher, M.; Fu, C.; Limaye, R.; Duster, J.; Tan, Y.; Balankutty, A.; Alpman, E.; Lee, C. C.; Nguyen, K. M.; Lee, H.; Ravi, A.; Suzuki, S.; Carlton, B. R.; Kim, H. S.; Verhelst, M.; Pellerano, S.; Kim, T.; Venkatesan, S.; Srivastava, D.; Vandervoorn, P.; Rizk, J.; Jan, C.; Ramamurthy, S.; Yavatkar, R.; Soumyanath, K.
IEEE journal of solid-state circuits, 2013-Jan., 2013, 2013-01-00, 20130101, Volume: 48, Issue: 1Journal Article, Conference Proceeding
An × 86 standard operating system compliant System-on-Chip (SoC) with a dual core ATOM processor and a custom interconnect fabric to enable modular design is presented. The 32 nm SoC includes integrated PCI-e Gen 2, DDR3, legacy I/O, voltage regulators, clock generation, power management, memory controller and RF portion of a WiFi transceiver in a 32 nm high-k/metal-gate RF CMOS process with high resistivity substrate. The integrated RF transceiver for 2.4 GHz 802.11g operation achieves a receive sensitivity of -74 dBm, -8 dBm IIP3 and a transmit output power of 20.3 dBm (-25 dB EVM) at 14% TX RF efficiency.
