Two K-band switch circuits, each consisting of a single-pole double-throw (SPDT) switch, have been built using a 0.15 μm GaAs process. One circuit utilizes diode techniques while the other utilizes ...field effect transistor (FET) techniques. The diode single-pole double-throw switches that have been devised exhibit exceptional linearity and are capable of withstanding high power levels. The switches exhibit a return loss of 10 dB or higher, an insertion loss of 3 dB or lower, and operate within a frequency range of 19 GHz to 25 GHz. They have a compact design with a core size of only 1.05 mm2 and consume a total power of 136.8 mW. The FET SPDT switch circuits are created utilizing a parallel–parallel quarter-wavelength transmission line architecture. This design allows for a higher power output compared to using a diode. The transistorized single-pole double-throw switch circuit is designed using a parallel–parallel quarter-wavelength transmission line architecture. This design ensures a low insertion loss. By adjusting the length of the transmission line, the circuit can operate in both frequency bands; the K-band and Ka-band.
Water treatment is the most concerned research area as it is closely related to the quality of human life. Capacitive de-ionization (CDI) has become a popular desalination technique for water ...treatment in recent years; however, transferring CDI technology to practice industrial applications face many problems due to the lack of experience and ability of monitoring on its operation status. Thus, in this article, a novel self-powered smart monitoring platform (SMP) is codesigned with a laboratory-scale CDI cell by providing regulated polarized voltage to prevent faradaic reactions and to evaluate CDI's performance using desalination metrics. The proof-of-concept SMP can acquire sensory data and wirelessly transmit information to the reader by radio-frequency identification (RFID) technique. A laboratory-scale CDI cell is fabricated in house by the cost-effective carbon electrodes with high electrochemical stability. Experiments are conducted to evaluate the function of the system on real-time monitoring of the CDI cell for their conductivity, salt absorption, and charge efficiency. The measurement results demonstrate that the proposed prototype is effective in terms of supplying, monitoring, and diagnosing the operation condition of the CDI cell. Furthermore, the proof-of-concept SMP developed for the CDI reactor can achieve up to 8.8-m communication distance, while consuming 402.6 μ W active power during operation. Therefore, it is a suitable choice for low-power and low-cost wireless sensor network.
Memristors are among emerging technologies with many promising features, which makes them suitable not only for storage purposes but also for computations. In this work, focusing on in-memory ...computations, we first present our semi-serial IMPLY-based adder and perform an extensive analysis of its merits. In addition to providing a favorable balance between the number of steps and number of memristors, a key property of the presented adder is its compactness as compared to the state-of-the-art adders. Next, using our semi-serial adder, we propose an IMPLY-based multiplier. We show that the proposed multiplier is more than <inline-formula> <tex-math notation="LaTeX">\mathbf {5\times } </tex-math></inline-formula> better than other works based on the figure of merit which gives equal weight to the number of steps (i.e., speed) and required die area. Additionally, we provide a deeper insight into IMPLY-based arithmetic units, their properties, design characteristics, and advantages or disadvantages compared to one another by proposing new figures of merit and performing comprehensive comparative analyses. This facilitates the process of design, or selection, of suitable units for the design engineers and researchers in the field.
In the above article <xref ref-type="bibr" rid="ref1">1 , the authors would like to report the following typos and the missing definition for <inline-formula> <tex-math notation="LaTeX">N ...</tex-math></inline-formula>.
This article presents an event-driven ultralow-power radio intended for miniaturized biomedical implants. In its powerlink, the system employs an RF-to-dc converter to scavenge energy from the ...electromagnetic waves in the 2.4-GHz unlicensed industrial, scientific, and medical (ISM) band. The bidirectional time-division datalink is realized by exploiting the 915-MHz ISM band, and its operation is coordinated by a smart control module, where the cyclic redundancy check is conducted to switch the system between monitoring and interrogation modes. A proof-of-concept radio is fabricated in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process with the chip area of 1.4 mm 2 . Without employing any external components, the radio is robust to process, supply voltage, and body temperature variations, leading to a low-cost and highly integrated wireless solution. During the monitoring mode, the downlink data reception and demodulation are realized by a receiver that consumes <inline-formula> <tex-math notation="LaTeX">27.5~\mu \text{W} </tex-math></inline-formula> while achieving a sensitivity of −69 and −59 dBm at the data rates of 1 and 100 kb/s, respectively. Dissipating peak power of <inline-formula> <tex-math notation="LaTeX">49.5~\mu \text{W} </tex-math></inline-formula> in the interrogation mode, the data transmitter delivers an output power of −30.6 dBm with a data rate of 2.5 Mb/s.
This article presents a 28-GHz power amplifier (PA) suitable for fifth-generation (5G) wireless systems. Designed in a 65-nm bulk CMOS, the PA achieves a saturated output power (P sat ) of 23.2 dBm ...at 28 GHz. The AM-AM and the AM-PM distortion have the overshoot of less than 0.3 dB and 0.2°, respectively, at 28 GHz. The AM-PM variation remains less than 1.9° over the frequency band of 26-31 GHz with a peak power-added efficiency (PAE) of 35.5%. Several techniques, including strategic placement of varactors, a proposed multi-function coplanar-waveguide (CPW)-like power combining structure, and a systematic design approach for the passive networks, are used to improve the efficiency and linearity of the design leading to a negligible difference between P 1 dB and P sat . The proposed linearity improvement technique, which uses an adaptive feedback structure to adjust the input impedance of the output stage based on the output power and also direct more current at higher output power levels, enhances the linearity through lowering both AM-AM and AM-PM conversions. The design enables 2.5-GS/s 64-QAM operation at average P out of 16.1 dBm with an error-vector magnitude/adjacent-channel power ratio (EVM/ACPR) of better than -26.2-dB/-28.32-dBc without using any digital pre-distortion.
In this paper, we present a low-power event-driven receiver intended for miniaturized biomedical implants. The fully integrated system can operate by power harvesting from electromagnetic fields ...using a radio frequency-to-dc converter or through a 0.5-V voltage supply such as a rechargeable battery. Without any external component and calibration overhead, the proposed double-mixing receiver is operating at a frequency of 915-MHz industrial, scientific, and medical band and is robust to process, supply voltage, and body temperature variations. The proof-of-concept receiver is designed and implemented in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS technology. The system occupies a silicon area of 0.75 mm 2 and consumes only 9.1-<inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula> power while achieving a sensitivity of −48 and −39 dBm at the data rate of 1 and 100 kb/s, respectively.
In radio-frequency (RF) transceiver system, the receiver is used to convert RF signal to low/medium frequency for signal processing and information gathering. In the paper, a novel high-gain, ...low-noise CMOS mixer is designed and analyzed. In the design, gain-boosting and PMOS dynamic switching current are employed to achieve better effects of noise cancellation and trans-conductance enhancement. In order to improve the mixer’s performance, the designed structure is mainly based on the double-balanced Gilbert lattice mixer combined with the parallel LC resonant and optimum biasing networks. The mixer shows high conversion gain (
CG
), low noise figure (
NF
), and low power consumption performances based on made possible by 90-nm CMOS technology. Operated at 77 GHz, the input third-order intercept point (
IIP3
) is −6.14 dBm, and the maximum conversion gain is 18.4 dB. At an IF frequency of 200 MHz, a bilateral band noise figure of 9.2 dB is recorded, while 6.96 mW is consumed with 1.2-V and 2-dBm LO power.
Optimal design of CMOS mixer: A research review Zhang, Huan; Tang, Sida; Cai, Mengye ...
International journal of RF and microwave computer-aided engineering,
December 2022, 2022-12-00, 20221201, Letnik:
32, Številka:
12
Journal Article
Recenzirano
A mixer is an indispensable device in the RF transceiver system. Along with the rapid development of mobile communication technology, the demand on the RF mixer for compatibility with multiple ...communication standards and functional diversity is increasing. As a result, the mixer with wider bandwidth, lower noise, higher linearity, and less power consumption is urgently needed. In the article, the basic principle and the circuit architectures of the mixer are reviewed, including the essential performances such as linearity, noise, gain, bandwidth, and so forth. In addition, several aspects are presented, compared, and discussed with particular emphasis on optimization design approach and performance. Current design and fabrication challenges, future development, application areas of the mixer and visions for the mixer are also discussed in this review.
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