The super self-aligned submicron single-metal FET (SASSFET), a FET-based integrated circuit technology suitable for fabrication of high-speed GaAs and InP circuits, is demonstrated. With nonalloyed ...source and drain contacts realized by MOCVD regrowth, the SASSFET is a uniform, dense, selfaligned, single-metal technology that achieves submicron dimensions with optical lithography. A 0.4 μm gate length junction HFET fabricated with the SASSFET technology has a transconductance of 380 mS/mm and a good high-frequency performance with f/sub /spl tau// of 45 GHz and f max of 80 GHz.
The output conductance in GaAs air-gap MESFETs Nguyen, N.; Kiziloglu, K.; Ibbetson, J. ...
IEEE transactions on electron devices,
1992-Nov., 1992-11-00, 19921101, Letnik:
39, Številka:
11
Journal Article
Recenzirano
Summary form only given. Theoretical studies have led to the conclusion that substrate injection into the epilayer underneath the channel plays a major role in the output conductance of the GaAs ...MESFET. The authors believe that vacuum (or an air gap) itself would be the best layer to have underneath the channel. They propose the technology to achieve such devices. This technology would also eliminate the undesirable sidegating and backgating effects in GaAs MESFET. One starts with an MBE (molecular beam epitaxy)-grown MESFET structure which has an AlAs layer under the GaAs channel layer. Fabrication of the MESFET involves mesa etching, source-drain metallization for nonalloyed contacts, and gate definition. Once the device is completed, one removes the AlAs layer by free etching the device in diluted HF, which selectively etches the AlAs layer. Other epilayers and metals are unaffected by the etchant. The channel is supported by the source and drain metals.< >
Summary form only given. The authors present a technology for increasing the gate-drain breakdown of AlInAs/GaInAs HEMTs (high electron mobility transistors) to record values without substantial ...impact on other parameters such as I/sub dss/ and g/sub m/. The breakdown in these structures is dependent on the multiplication of electrons injected from the gate (gate leakage) and the source (source current) into the channel. In addition, holes are generated by high fields at the drain and are swept back into the gate and source electrodes. These phenomena can be suppressed by increasing the gate barrier height and alleviating the fields at the drain. In the present approach both have been achieved by incorporating a P+ -2DEG junction as the gate which modulates the 2DEG (two-dimensional electron gas) and by utilizing a selective regrowth of the source and drain regions by MOCVD (metal-organic chemical vapor deposition). The 1- mu m gate-length devices fabricated show a full channel current of 340 mA/mm, a transconductance of 240 mS/mm, and a gate-drain breakdown voltage of 30 V (L/sub GD/=1 mu m) at 1 mA/mm gate leakage.< >
