Nonvolatile flip-flops (nvFFs) enable frequent-off processors to achieve fast power-off and wake-up time while maintaining critical local computing states through parallel data movement between ...volatile FFs and local nonvolatile memory (NVM) devices. However, current nvFFs face challenges in large store energy (ES) and long voltage stress time on the device (TSTRESS), due to wide distribution in the write time of NVM device as well as unnecessary writes. Moreover, heavy parasitic load on the power rail cause long wake-up time for restoring data from NVM to FFs. This paper proposes the resistive RAM (ReRAM)-based nvFF with self-write termination (SWT) and reduced loading on power rail to: 1) reduce 93+% waste of ES from fast switching or matched cells; 2) suppress endurance and reliability degradation resulted from overprogramming and long TSTRESS; and 3) achieve reliable and 26+ times faster restore operation compared with previous nvFFs. We have fabricated a nonvolatile processor and a test chip with SWT-nvFFs using logic-process ReRAM in a 65-nm CMOS process. Measured results show sub-2-ns termination response time and sub-20-ns chip-level restore time.
A true random number generator based on perpendicularly magnetized voltage-controlled magnetic tunnel junction devices (MRNG) is presented. Unlike MTJs used in memory applications where a stable bit ...is needed to store information, in this work, the MTJ is intentionally designed with small perpendicular magnetic anisotropy (PMA). This allows one to take advantage of the thermally activated fluctuations of its free layer as a stochastic noise source. Furthermore, we take advantage of the voltage dependence of anisotropy to temporarily change the MTJ state into an unstable state when a voltage is applied. Since the MTJ has two energetically stable states, the final state is randomly chosen by thermal fluctuation. The voltage controlled magnetic anisotropy (VCMA) effect is used to generate the metastable state of the MTJ by lowering its energy barrier. The proposed MRNG achieves a high throughput (32 Gbps) by implementing a
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MTJ array into CMOS circuits and executing operations in a parallel manner. Furthermore, the circuit consumes very low energy to generate a random bit (31.5 fJ/bit) due to the high energy efficiency of the voltage-controlled MTJ switching.
A word line pulse (WLP) circuit scheme is proposed toward the implementation of magnetoelectric random access memory (MeRAM). The circuit improves the write error rate (WER) and cell area efficiency ...by generating a better write pulse compared to conventional bitline pulse (BLP) techniques in terms of the pulse slew rate and amplitude. For the voltage-controlled magnetic anisotropy-induced precessional switching of the magnetic tunnel junction (MTJ), the write pulse shape has a large impact on the switching probability. Typically, a square shape pulse results in higher switching probability compared to that of a triangular shape pulse with long rise and falling edges, since the square shape pulse causes a more stable precessional trajectory of the free layer magnetization by providing a relatively constant in-plane-dominant effective field. Compared to the BLP scheme, the WLP can generate a better square shape pulse by eliminating discharge paths under the pulse condition, using the gain of the access transistor, and effectively diminishing the capacitive loading which needs to be driven. A macrospin compact model of voltage-controlled MTJ shows that the WLP can improve WER by 10 7 times and allow MeRAM to have four-time improvement in area efficiency of driver circuits compared to the BLP.
We review the recent progress in the development of magnetoelectric RAM (MeRAM) based on electric-field-controlled writing in magnetic tunnel junctions (MTJs). MeRAM uses the tunneling ...magnetoresistance effect for readout in a two-terminal memory element, similar to other types of magnetic RAM. However, the writing of information is performed by voltage control of magnetic anisotropy (VCMA) at the interface of an MgO tunnel barrier and the CoFeB-based free layer, as opposed to current-controlled (e.g., spin-transfer torque or spin-orbit torque) mechanisms. We present results on voltage-induced switching of MTJs in both resonant (precessional) and thermally activated regimes, which demonstrate fast (<;1 ns) and ultralow-power (<;40 fJ/bit) write operations at voltages ~1.5-2 V. We also discuss the implications of the VCMA-based write mechanism on memory array design, highlighting the possibility of crossbar implementation for high bit density. Results are presented from a 1 kbit MeRAM test array. Endurance and voltage scaling data are presented. The scaling behavior is analyzed, and material-level requirements are discussed for the translation of MeRAM into mainstream memory applications.
A high-speed and low-power prepared and write sense amplifier (PWSA) is presented for magnetoresistive RAM (MRAM). The sense amplifier incorporates a writing circuit for MRAM bits switched via timing ...of precessional dynamics (~GHz speed) in a magnetic tunnel junction (MTJ). By combining read and write functions in a single power-efficient circuit, the PWSA allows for fast read and write operations while minimizing the bit error rate after data programming. The PWSA circuit is designed based on a 65 nm CMOS technology, and the magnetic dynamics are captured by a Verilog-A compact model based on macrospin behavior for MTJs. Using the preread and comparison steps in the data program operation, we are able to reduce write power consumption by up to 50% under random data input conditions. Furthermore, using the voltage-controlled magnetic anisotropy effect for precessional switching, more than 10× reduction of write power and transistor size both in the memory cell and the write circuit is achieved, compared with using the spin transfer torque effect. The circuit achieves 2 ns read time, 1.8 ns write time, and 8 ns total data program operation time (consisting of two read steps, one write step, and a pass/fail check step) using this PWSA concept, and a 2× larger sensing margin through the current feedback circuit.
Capacitive Pressure Sensors
Low sensitivity at large pressure has been a long‐lasting obstacle of capacitive pressure sensors. In article number 2103320, Nanshu Lu and co‐workers introduce a ...hybrid‐response pressure sensor (HRPS), which offers a promising solution to this challenge. By laminating an electrically conductive porous nanocomposite (PNC) with an ultrathin insulating layer, the combined piezoresistivity and piezocapacitivity of the PNC enable up to 423% improvement over existing sensors.
There are several advantages of low flow anesthesia including safety, economics, and eco-friendliness. However, oxygen concentration of fresh gas flow and inspired gas are large different in low flow ...anesthesia. This is a hurdle to access to low flow anesthesia. In this study, we aimed to investigate the change in inhaled oxygen concentration in low flow anesthesia using oxygen and medical air.
A total of 60 patients scheduled for elective surgery with an American Society of Anesthesiologist physical status I or II were enrolled and randomly allocated into two groups. Group H: Fresh gas flow rate (FGF) 4 L/min (FiO₂ 0.5). Group L: FGF 1 L/min (FiO₂ 0.5). FGF was applied 4 L/min in initial phase (10 min) after intubation. After initial phase FGF was adjusted according to groups. FGF continued at the end of surgery. Oxygen and inhalation anesthetic gas concentration were recorded for 180 min at 15 min interval.
The inspired oxygen concentration decreased by 5.5% during the first 15 min in the group L. Inspired oxygen decreased by 1.5% during next 15 min. Inspired oxygen decreased by 1.4% for 30 to 60 min. The inspired oxygen of group L is 35.4 ± 4.0% in 180 min. The group H had little difference in inspired oxygen concentration over time and decreased by 1.8% for 180 min.
The inspired oxygen concentration is maintained at 30% or more for 180 min in patients under 90 kg. Despite some technical difficulties, low flow anesthesia may be considered.
Development of mobile collaborative applications requires non-trivial amounts of efforts in enabling multi-device resource sharing. The current practice of mobile collaborative application ...development remains largely at the application level. In this paper, we present CollaboRoid, a platform-level solution that provides a set of system services in the Android stack. It abstracts the sharing of not only hardware resources, but also software resources and multimedia contents between multiple mobile devices. We demonstrate the efficacy of CollaboRoid first with an example mobile collaborative application developed using CollaboRoid followed by extensive experiments with several collaboration scenarios on Nexus 5 and 7 devices. Our experimental results confirm that (1)the latency of remote resource access remains sufficiently low for collaboration, and (2)the additional energy consumption for collaboration is insignificant considering the benefit of energy sharing effect.
In order to identify the source of charge trapping sites causing the device instability, we carry out ab initio calculations on the interface between amorphous SiO2 and InGaZnO4. The interface ...structure is modeled by joining the two amorphous phases with additional annealing steps. The theoretical band offset is obtained by aligning oxygen 2s levels and shows good agreement with experiment. For the stoichiometric interface, we could not identify any defects within the gap that can capture positive holes. However, when oxygen vacancies are introduced at the interface, the Si–metal bonds are formed, resulting in the defect levels within the band gap. When positively charged with holes, the Si–metal bonds undergo huge relaxations, implying that the recovery to the original neutral state should involve a large energy barrier. Such oxygen vacancies at the interface may play as charge‐trapping sites, affecting the long‐term device instability.
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