This work presents the performance and stability analysis of the proposed built-in self-read and write assist 10T SRAM (BSRWA 10T) for better performance in terms of thermal stability and fast write ...access, which is suitable for military and aerospace applications. The performance of the proposed SRAM cell dominates the previous SRAM cells, i.e., conventional, fully differential 10T-ST (FD 10T-ST), single stacked disturbance-free 9T-ST (SSDF 9T-ST). The proposed SRAM cell dominates the SSDF 9T-ST SRAM cell in terms of write ability. The built-in self-read and write assist structure of the memory cell also dominates the improved write ability of SSDF 9T-ST SRAM by assist circuits such as negative bit line, ultra-dynamic voltage scaling (UDVS), write assist combining negative BL, and VDD collapse. The impact of assist circuits on write performance of memory cells is observed using Monte Carlo simulation for write margin (WM) parameter. WM of SSDF 9T-ST SRAM is improved by 15% and 25% by adding UDVS assist circuit and write assist combining negative BL and VDD collapse circuit. But BSRWA SRAM cell itself can improve WM by 32% without any assist circuit. The impact of temperature variation on the performance of memory cells is observed using Monte Carlo simulation for the HSNM parameter. The deviation of HSNM for 15°C to 55°C is 14%, 5%, 4%, and 1% in conventional SRAM cell, FD 10T SRAM cell, SSDF 9T SRAM cell, and proposed BSRWA 10T SRAM cell, respectively. The proposed SRAM cell is designed at a 22 nm CMOS technology node and verified in the Synopsys Custom compiler. MC simulation results are monitored on Synopsys Cosmo-scope wave viewer.
This paper presents a reconfigurable negative bit line collapsed supply (RNBLCS) write driver circuit for the 9T Schmitt trigger-based static random-access memory (SRAM) cell (9T-ST), significantly ...improving write performance for real-time memory applications. In deep sub-micron technology, increasing device parameter deviations significantly reduce SRAM cells' write-ability. The proposed RNBLCS write-assist driver for 9T-ST SRAM cell has 0.84×, 0.48×, 0.27× optimized write access delay and 1.05×, 1.08×, 1.19× improvement in write static noise margin (WSNM), 1.05×, 1.13×, and 1.39× improvement in write margin (WM), 0.96×, 0.89× and 0.72× minimum write trip-point (WTP) from transient-negative bit line (Tran-NBL), capacitive charge sharing (CCS), and conventional write circuits respectively. The proposed RNBLCS is functionally verified using a synopsys custom compiler with a 16 nm BSIM4 model card for bulk complementary metal-oxide semiconductor ( CMOS).
This paper presents two low power design techniques used for successive approximation registers (SAR) analog-to-digital converter (ADC) for transmission of Physiological signal: Dual split switching; ...set and reset phase. Dual split switching is used in one sided charge scaling digital-to-analog converter (DAC) to edge of the switching energy by reducing the leakage in dual transmission gate. The set and reset phase defines the amplification and comparison phase of the comparator. The delay time of the comparator is profoundly reduced with folded cascoded pre amplifier and a regenerative latch. A Serial In Parallel Out (SIPO) N bit register and SAR are designed with negative edge triggered D Flip-Flop (DFF). For power optimization the supply voltage of SAR ADC is designed with 500 mV. The Variable threshold concept has been utilized in the entire design to operate the SOC with 500 mV supply voltage. The designed SAR ADC is capable of supporting the sampling rate of 1 Msps. The circuit is designed using standard UMC 180 nm technology. The simulation results show that the power consumption of the SAR ADC is 13.99 μW and achieved 68.54 dB SFDR with ENOB value 7.69 bits. The DNL (max) is + 0.9/− 0.82 LSB and INL 1.06/− 1.31 LSB.
An Ultra-Wide Band (UWB) Low Noise Amplifier (LNA) is affective in deciding the chip size and in the implementation cost at Radio Frequency applications. The proposed LNA design with an active ...inductor is a different solution to trounce the habit of passive inductors to cut the chip area. Designed in 90-nm CMOS process, a voltage gain of 9dB to 15.5dB for a supply voltage of 0.9v to 1.8V with a smallest Noise Figure (NF) of 5.7dB is achieved by the LNA, with low power utilization and at 2.40 GHz, with 345um2 of chip area.
The rapid growth in digitization transmission of information in the form of RGB image. During the process transmission of the image in a channel, some data may be degraded due to noise. At receiver ...side error in data has to be detected and corrected. Hamming code is one of the popular techniques for error detection and correction. In this paper new algorithm proposed for encryption and decryption of RGB image with DNA cryptography and hamming code for secure transmission, and correction. this algorithm first encodes data to hamming code and encrypted to DNA code. Two-bit error detection and correction for each pixel of the image can be performed.DNA code improves security and use of the Hamming code for error detection and correction. For the image of size 256*256 pixel image, it corrects up to 2*256*256 bits in RGB image. The RGB image encryption and decryption design using Verilog and implemented using FPGA (Field Programmable Gate Array).
Abstract
The undisclosed word structure is the mainly usual process among existing techniques on the data communication process and is executed more simply and efficiently than remaining techniques. ...It is a susceptible method by protecting attacks such as replay or eavesdropping. To overcome this trouble, AES based cryptography system is used. In this paper we have proposed a process and module which is optimized and uses low-power cryptographic technique. Cryptography is the existing world serves significant function for data safety communications. The projected technique is OTP based AES 128-bit. This FPGA system is design by using Verilog HDL.
FPGA Based OTP Generation System for Data Security Noorbasha, Fazal; Krishna, Ch. Rahul; HafijullaIrshad, Shaik
International journal of recent technology and engineering,
01/2020, Letnik:
8, Številka:
5
Journal Article
Odprti dostop
The password system is the most conventional method among validation techniques on the internet and is operated more easily and effectively than other methods. However, it is a vulnerable method ...against attacks such as eavesdropping or replay attack. To prevail over this problem, OTP (One Time Password) technique is used. The most popular OTP is HOTP algorithm, which is based on one-way hash function SHA-1. The recent researches show the weakness of the hash function. So, in this paper we created a module which uses another cryptographic algorithm. Cryptography in the current world serves an important role in data security. Cryptography means writing of secret codes (cipher text) which is in an unintelligible form and cannot be read unless we have a perfect key to decode it. The proposed method is AES algorithm (128 bit) followed by Middle Square method to generate an OTP. As OTP is a 4-6 bit number we will decrease the AES output to a 4-6 bit through Middle Square method and this OTP can be used as a security tool in many cases like online transaction purposes.
Abstract
This article describes the controlling of robot arm using different operations with choice. It is a programmable arm to hold and place the objects. Also it can change the position of the ...objects. The addition features are added to robotic arm using a reprogrammable FPGA mechanism. The robotic arm parts are jointed to give flexible move and rotate movements. We have used spartan3 FPGA to implement and test the robot arm conditions. We have used digital controlling inputs to control the robot arm directions.
In extremely inhabited countries like India, the population increases day by day because of this problem so many new types of the innovations are developed but in this project mainly focus on the ...automobiles. For industry reputation purpose car are made with high boost engines which is nearly speed equal to the trains. Due to this over speed so many accident will happen so many lives will lose. Even when the vehicle is travel in unpopular area if there is any accident happen it intimate to the relatives, hospitals and as well as the polis near by the location. In this project first it detects the output from the sensor and that sensor gives the disturbances happen in the directions of the vehicle. And this sensor make to communicate with the other people by using cross communication devices it particularly dedicated for the short range communication. Presently this technology is used in V2V communication .But in this project we mainly focus on the getting the location from the user devices to any other mobile number which are registered before. Major part of the paper we designed in the Verilog implementation whenever the input crosses the threshold voltage it automatically send the information to the user
FPGA Based Health Monitoring System Noorbasha, Fazal; Kishore, Bevara; Re ddy, Koushik ...
International journal of recent technology and engineering,
01/2020, Letnik:
8, Številka:
5
Journal Article
Odprti dostop
In present days, Health issues are occurring more frequently. Because of climatic changes, industrialization and technical advancement which led to reduced physical activity. Saving lives requires ...monitoring the health conditions of people who have chronic diseases or heart related problems. Decrease in morbidity from disease and extend lives can be achieved by earlier detection of problems. When we reach a certain age we have to keep monitoring the three vital signs of the body to extend our lives. In this paper, we are designing a healthcare monitoring system which can either monitor or measure three vital signs i.e. heart rate, respiratory rate and body temperature of human body. The developed system uses wearable sensors to measure body temperature, heart rate and breathing rate. In order to minimize human involvement and respond at an appropriate time a health monitoring designed FGPA system will take the data from the sensors and analyze the date. It will give the health report, health status and alerts the concerned whenrequired.
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