In this paper, new vertical and lateral MOS structures are proposed, in which P
+ layers called floating islands are located in the drift region. These new structures, called “FLIMOS” (floating ...islands metal–oxide semiconductor) transistors, are based on the FLI–diode concept in which the voltage handling capability is obtained by many PN junctions in series instead of the conventional diode, where the breakdown voltage is supported by only one PN junction. In the medium voltage range (200–1000
V), the on-state performance of vertical FLIMOSFET is strongly improved when compared to the conventional MOSFET. For instance, for a 900-V vertical FLIMOSFET, a reduction of the specific on-resistance of about 70% relative to the conventional structure and of 40% relative to the silicon limit is observed. But for a 180-V lateral FLIMOSFET, a reduction of 28% relative to the conventional structure is observed, which is not a very significant improvement when compared to medium voltage vertical devices.
The Danish system of research ethical committees (RECs) was established in 1978 and formal legislation on RECs was passed in 1992. We have investigated the general knowledge about the RECs through a ...telephone survey of a random sample of the adult Danish population. Among the 1137 respondents only 342 (30%) were aware of the existence of an official body which controls medical research, and only a small minority was aware of the composition of the RECs and that the laymembers outnumber the professional members. Knowledge about RECs was positively correlated to higher education, young age, and being male. It is argued that there is a need for increased public information about the existence and composition of the Danish RECs.
We present in this paper some techniques to decrease the value of the drift region on-resistance of a lateral DMOS transistor (LDMOS). We first evaluate the technique using a shallow implanted layer ...between the channel and the drain of the transistor, whose doping is somewhat higher than the background doping level. Dose and energy should be carefully calibrated in order to ensure the largest on-resistance improvement but a good trade-off with the breakdown voltage is difficult. Secondly, we assess the on-resistance improvement achievable using a semi-resistive layer deposited between the gate and drain metals above the oxide layer. This will enhance the accumulated drift area and consequently decrease the on-resistance. The achievable improvement is less than for the surface doping technique. We propose to use both techniques to obtain the best on-resistance improvement/breakdown voltage trade-off. Surface doping will be employed to decrease the on-resistance and the semi-resistive layer will keep the breakdown voltage to its optimal value. We assess and demonstrate, with both analytical and numerical analyses, that large improvements can be achieved with these techniques without degrading the voltage handling capacity of the device. The on-resistance can be lowered by 40 to 66%. Experimental LDMOS transistors will be presented which exhibit good agreement with the theoretical predictions.
