Single-phase power converters suffer from the double frequency power pulsation. In voltage source inverters, the dc bus capacitor is designed to supply this double frequency current. The stringent dc ...bus voltage ripple specifications call for larger capacitance. This implies larger electrolytic capacitors. However, the electrolytic capacitor suffers from short-term life span, which consequently brings down the lifetime of the converter. As an alternative, active power decoupling (APD) ensures significant reduction in dc buffering requirement, thereby reducing the bus capacitance. This can make use of the film capacitors with better lifespan. In this paper, an APD scheme is designed and developed for the grid-connected system. Another important feature of the proposed scheme is that, it reduces the stress on the switches significantly while compared with existing APD solutions for all load power factors. The system is analyzed further to arrive at APD control conditions including the effect of grid filter inductance. The simulation and experimentation have been done to validate the proposed method. Additionally, the stress on the switches as a function of grid filter inductance is predicted theoretically and verified practically. The average stress on the switches is shown to be lesser than the existing solutions.
This paper proposes a unified control based utility-interactive uninterruptible power converter (UIUPC). The proposed control enables the UIUPC to inherently transfer from a p-q control strategy in ...grid-connected mode to a voltage-frequency control strategy in autonomous mode and vice-versa. This happens seamlessly with the same control topology. The need to switch between two separate control architectures is thus eliminated. Critical islanding detection and synchronizing mechanisms are also not needed in the proposed control method. The unified controller proposed in this paper is derived from the concept of controlling the perturbations in the magnitude and speed of the point of common coupling (PCC) space vector. The PCC space vector is compared with a reference space vector applied in the direction of the PCC space vector on an instantaneous basis to extract the perturbations. The reference system of the proposed control is linked to the dynamics of the PCC space vector. This offers the ability of parallel operation of similar unified control UIUPC. Thus, in addition to the above said advantages, the proposed control also puts forth an alternative to paralleling approaches like conventional droop and master-slave configurations. The effectiveness of the proposed control is validated by simulation and experimentation.
The instantaneous power in a single-phase system pulsates at double the supply frequency. With the effective use of the storage element, the electrolytic capacitor placed at the dc bus can be ...replaced by film capacitors, thereby improving the converter lifespan. Active power decoupling (APD) using an extra set of switches aims to attain the same. Recently, a promising APD topology has been reported, offering a lesser number of switches, as well as lesser stress on the switches for a wide range of power factor. However, the control of that converter poses a challenge as it has more number of states than the independent control variables. This paper focuses on the control aspect of the topology. It is shown that controlling two out of three states guarantees the overall system performance at the steady state. Also, ripple power in the dc bus is controlled in a closed-loop fashion so as to handle model uncertainty and thereby improve the steady-state performance. Furthermore, the solution to suppress the harmonic power, reflected on to the dc bus, under polluted grid condition is provided. The simulation and experimental results are presented supporting the analysis and design of the controller structure.
Solar power is an excellent alternative to existing power sources; standalone PV systems demonstrate its importance. PV panels are the energy source for connected loads, with storage systems or ...batteries necessary due to solar insolation’s intermittency. The present investigation uses a novel high-efficiency DC-DC converter to perform the maximum power point tracking (MPPT). This converter enables the connection of solar panels in series or parallel because it can step up or step down the PV voltage according to the DC link voltage. A bidirectional DC-DC converter is also used at the load side to maintain DC link voltage and charge/discharge the batteries. The second part of the paper discusses a modified Perturb and Observe (P &O) MPPT algorithm, which is vital in tapping the maximum power from PV panels. A fast solar MPPT is desired to track the operating point, which can be served by adding an acceleration factor to the existing P &O (hill climbing) solar MPPT algorithm. With the inclusion of the proposed converter and modification in P &O algorithm, the obtained system’s efficiency is approximately 96% and tracking time reduced from 7 sec to 3.7 sec. The detailed analysis of component efficiency provides valuable insights into the performance of the system. A comprehensive simulation and hardware results obtained for various irradiation (Ropp, sine, step, ramp, less, no, etc.), temperature, loads, and acceleration factors are presented.
This paper presents a nine-level inverter topology for an open-end induction motor drive requiring only eight switches per phase, using two three-level inverters with two isolated dc links in a 3:1 ...ratio. A space-vector-based formulation is used to determine pole voltages such that both inverters supply power to the load over the full modulation range, eliminating the possibility of dc bus overcharging. Proper selection of switching states ensures that all floating capacitor voltages are kept tightly balanced. A digital state machine is used to select sequences of switching states in order to eliminate deadtime-induced pole voltage transients, further improving the output-voltage quality. A level-shifted carrier-based pulse width modulation scheme is used. The steady-state and transient performance of this topology were verified and the experimental results are included.
This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained ...by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme.
This article proposes a fault-tolerant five-level inverter scheme for open-end induction motor (OEIM) drive application using a single dc link. The drive is fed with a primary inverter (a two-level ...inverter cascaded with a capacitor-fed H-bridge inverter) from one end and a secondary inverter (capacitor-fed two-level inverter) from the other end. The ratio of the dc-link voltage to the nominal capacitor voltage in the H-bridge and the secondary two-level inverter is maintained at 4:2:1. The capacitor balancing in the proposed scheme is achieved by space-vector (SV) redundancy. The proposed scheme gives five-level inverter operation with less number of components compared with other existing inverter topologies. Furthermore, the scheme provides fault-tolerant capability against a failure of the power switches in the H-bridges and the secondary two-level inverter. The experimental results in steady and transient states are presented. Also, the inverter operation during fault is provided to validate the effectiveness of the proposed scheme.
An inverter circuit to generate a 13-level 24-sided polygonal voltage space vector structure (VSVS) comprised of 288 real active vectors and a zero vector is proposed in this article. The proposed ...scheme eliminates lower order harmonics up to 19th order and suppresses higher order harmonics from motor phase voltage in the full modulation range. The 48-step operation of the proposed scheme highly improves phase voltage quality at full speed. The dc bus utilization of the proposed scheme is improved to 99.42% compared to 90.6% multilevel hexagonal VSVS. The proposed topology has inherent capacitor balancing in every sampling interval at any loading condition using pole voltage redundancies. Multilevel property of the proposed scheme reduces instantaneous error in phase voltage compared to two-level 24-sided polygonal VSVS. Generation of real active vectors reduces instantaneous error in phase voltage and reduces switching frequency compared to switched average techniques existing in the literature. Fault-tolerant feature of the proposed scheme improves the availability of the drive system. Experimental results are provided to validate the steady-state operation, capacitor balancing, transient performance, and fault-tolerant capability of the proposed scheme. The comparison of switching loss and harmonic performance of the proposed scheme is performed with existing topologies.
This paper presents a method for generating a multilevel dodecagonal voltage space vector structure using a single dc source for induction motor drives. Multilevel dodecagonal structure combines the ...advantages of both multilevel and dodecagonal structures, and hence, generates low dv/dt phase voltage along with the elimination of fifth- and seventh-order harmonics over the entire modulation range. This eliminates low-order harmonic currents and prevents the generation of sixth-order torque ripple in the motor. The topology used requires only one dc source making four-quadrant operation of the drive system simpler compared to previously proposed multilevel topologies generating dodecagonal space vector structures. The topology used consists of a three-level flying capacitor (FC) inverter cascaded with a capacitor fed H-bridge. The FC inverter operates at a lower switching frequency and the low-order harmonics are eliminated by the switching action of the cascaded H-bridge inverter. The capacitors in the cascaded H-bridge modules are maintained at a substantially smaller voltage compared to the dc-link voltage and are inherently balanced during the pulsewidth modulation operation. This results in low switching loss, in the FC inverter as well as in the cascaded H-bridge inverter. Experimental results are included to validate the operation of the topology and modulation scheme presented in this paper.
This paper presents a reduced component count five-level inverter topology based on the stacked cell approach to multilevel inverters. The proposed topology utilizes the fundamental properties of ...three-phase voltages to reduce the number of switches and flying capacitors to cut size, weight and costs while facilitating higher reliability, simpler wiring and lesser electromagnetic interference. The operational aspects of the topology such as circuit structure, modulation and capacitor balancing are explained, followed by an account of device stresses and reliability. A discussion of certain additional features such as fault tolerant operation, loss steering and common-mode elimination addresses the usefulness of the topology in practical situations. A comparison of the proposed topology with existing methods in terms of several parameters is then used to highlight its merits and features. Finally, experimental results obtained using an induction motor drive incorporating the topology are given, so as to validate the feasibility of the proposed approach.
