Maximum power point tracking (MPPT) control is a key functionality in solar photovoltaic (PV)-based power conversion systems. A variety of perturbative MPPT control schemes are available in the ...literature, many of which are voltage-based techniques wherein the PV bus voltage is perturbed and set to the required level by an appropriate converter control that achieves the MPP tracking. However, a comprehensive plant model of the PV-fed converter system and a systematic control design of the PV bus voltage loop that facilitates the design of the MPPT control is not available in the literature. In this article, a detailed small-signal model is proposed for a single-stage PV-fed buck converter that acts as a battery charge-controller. The effects of parasitic storage elements present in the PV source as well as the interconnecting cable from rooftop are discussed in detail, along with the impact of series-parallel connection of the PV modules for power scaling. A full-order as well as a reduced-order model of the system is proposed and the various relevant transfer-functions are analytically derived. Based on this model and the control to converter input bus voltage transfer-function ṽ in /d̃, a systematic design procedure for the PV bus voltage controller is proposed. It is shown that such a design facilitates the selection of perturbation period of a typical MPPT control algorithm for an improved tracking performance. The steps involved in the system model development and the control design are generalized and can be extended to other converter topologies as well. Active transfer-function measurements and experiments conducted on a 1-kW charge-controller hardware prototype validate the accuracy of the proposed model and the tracking performance of the MPPT control.
Grid-forming (GFM) control offers promising performance features for inverter-based resources (IBRs) across scales. However, design, analysis, and benchmarking of GFM IBRs during unbalanced faults ...remains largely unexplored. In this article, we outline a stationary-reference-frame nested-loop control architecture for GFM IBRs and integrate the same with novel current-limiting strategies. The architecture improves on virtual-impedance and current-reference-saturation limiting as well as state-of-the-art methods for control of voltage-source inverters. Electromagnetic-transient simulations for a modified IEEE 14-bus network validate salient features of the proposed control architectures. The proposed virtual-impedance limiter is shown to provide better voltage support during faults than the current-reference-saturation limiter (quantified via sequence voltages). On the other hand, the current-reference-saturation limiter offers better (and more accurate) fault-current contribution.
Synchronous reference frame (SRF) phase locked loop (PLL) is a widely employed scheme for grid-synchronization of a three-phase grid-tied inverter (GTI). The SRF-PLL model considered for analysis in ...literature typically assumes the grid to be always present at the point of common coupling (PCC) in the form of a sinusoidal voltage source. The behavior of the SRF-PLL-based GTI system along with the local loads in case of a grid outage is typically not considered for the analysis. However, this is critical for the study of an unintentional island that is subsequently formed after grid-disconnection. This is required for ceasing system operation for safety reasons. In this work, a dynamic-phasor (DP)-based complex domain model of the GTI system is proposed for studying the behavior of an unintentionally islanded GTI, which leads to analytical solutions of the system. Using the proposed DP model, it is shown that the PCC voltage behavior is governed predominantly by the dynamics of two subsystems, namely, the local load characteristics and the SRF-PLL. The equilibrium solutions of the model are shown to yield the steady-state operating frequency of the islanded system with good accuracy, for various GTI power-factor and load quality-factors. Small-signal analysis is performed to linearize the DP equations. This yields insights into the stability of the multiple possible frequency solutions of the islanded system, which is analytically established using eigenvalue analysis. Simulation and islanding experimental results conducted on a 4.5 kVA three-phase GTI system are presented that validate the proposed DP model of the GTI, accuracy of the analytical frequency, and stability analysis of the islanded system.
In this article, a photovoltaic (PV) reconfigurable grid-tied inverter (RGTI) scheme is proposed. Unlike a conventional grid-tied inverter (GTI) that ceases operation during a power outage, the RGTI ...is designed to act as a regular GTI in the on-grid mode but it is reconfigured to function as a dc-dc charge-controller that continues operation during a grid outage. During this period, the RGTI is tied to the battery-bank of an external uninterruptible power supply (UPS)-based backup power system to augment it with solar power. Such an operation in off-grid mode without employing high-bandwidth communication with the UPS is challenging, as the RGTI control must not conflict with the battery management system of the UPS. The hardware and control design aspects of this requirement are discussed in this article. A battery emulation control scheme is proposed for the RGTI that facilitates seamless functioning of the RGTI in parallel with the physical UPS battery to reduce its discharge current. A system-level control scheme for overall operation and power management is presented to handle the dynamic variations in solar irradiation and UPS loads during the day, such that the battery discharge burden is minimized. The design and operation of the proposed RGTI system are independent of the external UPS and can be integrated with an UPS supplied by any manufacturer. Experimental results on a 4 kVA hardware setup validate the proposed RGTI concept, its operation, and control.
Wide-scale grid integration of wind-energy renewable systems at the utility scale has sparked interest in novel power-electronic architectures for the interface at medium-voltage (MV) grid. A recent ...effort in this direction involves a Power Electronic Transformer (PET) comprising back-to-back connected Modular Multilevel Converters (MMCs); here, one MMC interfaces with the MV grid, and the other so-called High-Frequency MMC (HF-MMC) interacts with the wind-energy system via an HF transformer and a low-voltage (LV) 2 L voltage-source converter (VSC). In this paper, a novel control architecture for operating the PET is presented, that achieves superior power transfer characteristics across the HF transformer. On the HF-MMC end, an online optimization-based modulation scheme is developed that ensures unity displacement power factor (DPF) operation and current harmonics minimization; while at the 2 L VSC end, the voltage phase angle is controlled to maintain the LV dc-bus. To achieve these and the desired performance improvements, two actions are performed: (a) the target control variables-voltage magnitude of HF-MMC and phase angle of 2L-VSC voltage-are enforced via appropriate control loops, and (b) the switching instances of the HF MMC sub-modules are engineered by solving an optimization problem online using the coordinate-gradient-descent method. Detailed simulation results on analysis and control are presented in MATLAB-SIMULINK. Furthermore, verification of LV dc-bus regulation, unity DPF operation during power transfer, and minimization of HF-link current harmonics are carried out in OPAL-RT-based hardware-in-loop (HIL) real-time simulations and experimental results on a scaled hardware prototype.
Sizing of ultracapacitor (UC) stack is an essential requirement in the design of energy storage systems (ESS), which are widely deployed today in varied power conversion applications. Unlike a linear ...capacitor that displays constant capacitance characteristics over the operating voltage range, UCs exhibit considerable nonlinearity in the form of voltage-dependent capacitance and display notable variation in characteristics during operation. Analyzing the behavior of the overall UC bank that consists of several stacked nonlinear UC cells and evaluating its effective capacitance is therefore critical. In this paper, an exact-analysis framework is presented for characterizing the nonlinear behavior of the overall UC stack. Closed-form expressions for the UC stack's effective voltage-dependent capacitance, terminal voltage characteristics, and stored energy are derived as a function of unit cell nonlinear parameters and the number of series-parallel cells, using which the deviations in the UC stack behavior from the linear characteristics are analytically captured. It is shown, owing to the linear model of the UC employed in existing design methods, that the resultant stack will either be (a) over-sized and expensive, or (b) insufficient to meet the ride-through specifications in practice as the inherent nonlinearity is ignored. To address these limitations, an improved UC stack design method is proposed based on the nonlinear UC model, which not only optimizes the size of the UC stack, but also guarantees that the ESS specifications are accurately met. Experimental results on two UC stack hardware prototypes validate the accuracy of the proposed nonlinear analysis and the improved design method for ride-through applications.
Ultracapacitors (UCs) today are playing an increasing role in the energy storage systems (ESSs) of several power conversion applications. In this article, a design method for optimal sizing of a UC ...stack is proposed, which minimizes the overall cost of the ESS. The problem is cast with normalized cost parameters of the ESS subsystem, using which the discharge ratio of the stack is optimized for the given ESS specifications. An iterative design algorithm is proposed which systematically engineers the stack parameters of unit cell capacitance, the number of series cells and parallel strings along with the initial and final stack voltage levels that meet the specified ESS requirements while also supplying the equivalent series resistance (ESR) loss. The iterative sizing process also factors in the maximum power transfer constraint imposed by the ESR to guarantee stable operation of the cost-optimal design even as the stack voltage varies during discharge. The design considerations, optimization framework, ESR effects, and the proposed sizing algorithm are synthesized in a generalized formulation in order to capture the variations in cost and subsystem parameter values that typically vary based on scaling requirements as well as the UC and power converter technology. Experimental results on a 4 kWmin UC stack validate the proposed cost-optimal design algorithm and the ESR induced voltage collapse.
This paper presents an approach to normalize dynamical-system models into per-unit transcriptions via similarity transformation. The method applies to nonlinear control-affine and linear state-space ...models. In this framework, parameters of the per-unit model are not determined a priori; rather, they emerge from the similarity transformation. This is a significant upgrade to the conventional approach of identifying base values for parameters with dimensional analysis so they can be normalized. Since the approach is grounded in system theory, several frequency- and time-domain attributes of per-unit models can be formalized. Furthermore, per-unit phasor models can be derived as a special instance. Case studies demonstrate these attributes in practice for linear and nonlinear systems including <inline-formula><tex-math notation="LaTeX">RLC</tex-math></inline-formula> circuits, transformers, and grid-following and grid-forming inverters. Numerical simulations incorporating these in a modified IEEE 37-bus network demonstrate accuracy and scalability.
A power filter is necessary to connect the output of a power converter to the grid so as to reduce the harmonic distortion introduced in the line current and voltage by the power converter. Many a ...times, a transformer is also present before the point of common coupling. Magnetic components often constitute a significant part of the overall weight, size and cost of the grid interface scheme. So, a compact inexpensive design is desirable. A higher-order LCL-filter and a transformer are increasingly being considered for grid interconnection of the power converter. This study proposes a design method based on a three-winding transformer, that generates an integrated structure that behaves as an LCL-filter, with both the filter inductances and the transformer that are merged into a single electromagnetic component. The parameters of the transformer are derived analytically. It is shown that along with a filter capacitor, the transformer parameters provide the filtering action of an LCL-filter. A single-phase full-bridge power converter is operated as a static compensator for performance evaluation of the integrated filter transformer. A resonant integrator-based single-phase phase locked loop and stationary frame AC current controller are employed for grid frequency synchronisation and line current control, respectively.
This paper discusses concepts of a 20 kVA power converter design and key differences between discrete IGBT and module-based design approaches. Module-based power converters have been typically ...employed in academic and research institutes for power levels of 10 kVA and more. However, with advancement in IGBT technologies and the growing need to minimize system size and weight, designs based on discrete devices are now an attractive alternative for such power levels. A simple procedure is presented for power converter design that includes power loss evaluation, heat-sink thermal characterization, thermal model of overall system and sizing of DC link capacitor. Using the same, a state-of-the-art discrete device and module-based power converters are designed. A comparison is subsequently made, where it is shown that discrete approach yields a compact and economic design up to a power level of 20 kVA. A key objective of this work is to lay emphasis on laboratory design of power converters. This enables a graduate level student to build a converter from start and in the process gain insights into the underlying engineering design aspects.
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